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SA2007H Datasheet, PDF (5/10 Pages) Sames – Single Phase Bidirectional Dual Element Power/Energy Metering IC with Pulse Output
SA2007H
INPUT SIGNALS
Voltage reference (VREF)
A bias resistor of 24kW sets optimum bias conditions on chip.
Calibration of the SA2007H should be done in the micro-
controllers software.
Output Mode (OMODE)
The output behavior of the SA2007H is selectable between
fixed width outputs or latched outputs. In fixed width mode the
P1 and P2 output pulses stay at a fixed width. In latched mode
the status of P1 and P2 are cleared with a logic 1 on the RP pin.
Refer to the “Output signals in latched mode” section (Page 6)
for further information.
OMODE Description
0
Fixed width mode
1
Latched mode
Clear Interrupt (RP)
A logic 1 on the RP input is used to clear the interrupt
generated by the SA2007H when a pulse is generated on P1
or P2, while operating in latched mode. By clearing the
interrupt in latched mode the status of the pulse outputs will
also be cleared.
Test Inputs (TEST, TCLK)
For normal operations these pins must be connected to VSS.
sames
OUTPUT SIGNALS
Pulse outputs (P1, P2)
The output on P1 and P2 is a pulse density signal representing
the instantaneous power/energy measurement as shown in
figure 4. The pulse width tp on P1 and P2 change with the
direction of energy measurement tp is 71.5µs for positive
energy and doubles (143µS) if negative energy is measured.
The output frequency may be calculated using the following
formula:
f = 11.16 x FOUT x ( II x IV ) / IR2
Where:
FOUT=
II
=
IV
=
IR
=
Typical rated output frequency (1360Hz)
Input current on current sense input (16µA at rated
conditions)
Input current on voltage sense input (14µA at rated
conditions)
Reference current on VREF typically 50µA
An integrated anti-creep function does not allow output pulses
on P1 or P2 if no power is measured by the device.
vMAINS
t
POWER
VxI
t
FOUT
DR-01282
t
tP
Figure 4: FOUT instantaneous pulse output
Direction indication (D1, D2)
The SA2007H provides information about the energy flow
direction of both current channels separately on pins D1 and
D2.
Logic 0 on pin D1 or D2 indicates reverse energy flow of that
particular channel. Reverse energy flow is defined as the
condition where the voltage sense input and current sense
input are out of phase (greater than 90 degrees).
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PRELIMINARY