BU91799KV-M Datasheet, PDF (9/29 Pages) Rohm – Low Duty LCD Segment Driver for Automotive Application

BU91799KV-M MAX 200 segments (SEG50×COM4)
Oscillator
The clock signals for logic and analog circuit can be generated from internal oscillator or external clock.
If internal oscillator circuit is used, OSCIN must be connected to VSS level.
When using external clock mode, input external clock from OSCIN terminal after ICSET command setting.
OSCIN
BU91799
VSS
OSCIN
BU91799
VSS
Clock
Figure 11. Internal Clock Mode
Figure 12. External Clock Mode
LCD Driver Bias Circuit
BU91799KV-M generates LCD driving voltage with on-chip Buffer AMP.
And it can drive LCD at low power consumption.
1/3 or 1/2 Bias can be set by MODESET command.
Line or frame inversion can be set by DISCTL command.
Refer to the “LCD driving waveform” for each LCD bias setting.
Blink Timing Generator
BU91799KV-M has Blink function.
Blink mode is asserted by BLKCTL command.
The Blink frequency varies depending on fCLK characteristics at internal clock mode.
Refer to Oscillation Characteristics for fCLK.
Reset Initialize Condition
Initial condition after execute Software Reset is as follows.
・Display is OFF.
・DDRAM address is initialized (DDRAM Data is not initialized).
Refer to Command Description for initialize value of registers.
Command / Function List
Description List of Command / Function
No.
Command
1 Mode Set (MODESET)
2 Address Set (ADSET)
3 Display Control (DISCTL)
4 Set IC Operation (ICSET)
5 Blink Control (BLKCTL)
6 All Pixel Control (APCTL)
7 EVR Set 1 (EVRSET1)
8 EVR Set 2 (EVRSET2)
Function
Display on/off, 1/2bias or 1/3bias setting
DDRAM address setting (00h to 31h)
Frame frequency, power save mode setting
Software reset, internal/external clock setting
( P2 is MSB data of DDRAM address )
Blink off/0.5s/1s/2s blink setting
All pixels on/off during DISPON
Set EVR 1
Set EVR 2
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TSZ02201-0P4P0D301050-1-2
8. Feb. 2016 Rev.001