BU91799KV-M Datasheet, PDF (12/29 Pages) Rohm – Low Duty LCD Segment Driver for Automotive Application

BU91799KV-M MAX 200 segments (SEG50×COM4)
Set IC Operation (ICSET)
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
C
1
1
0
1
P2 P1 P0
P2: MSB data of DDRAM address. Refer to “ADSET” command.
Set software reset execution
Setup
P1
No operation
0
Software Reset Execute
1
When “Software Reset” is executed, BU91799KV-M is reset to initial condition.
(Refer to Reset initialize condition)
Don‟t set Software Reset (P1) with P2, P0 at the same time.
Set oscillator mode
Setup
P0
Reset initialize condition
Internal clock
0
○
External clock
1
Internal clock mode: OSCIN must be connected to VSS level.
External clock mode: Input external clock from OSCIN terminal..
<Frame frequency Calculation at external clock mode>
DISCTL 80Hz setting: Frame frequency [Hz] = external clock [Hz] / 512
DISCTL 71Hz setting: Frame frequency [Hz] = external clock [Hz] / 576
DISCTL 64Hz setting: Frame frequency [Hz] = external clock [Hz] / 648
DISCTL 53Hz setting: Frame frequency [Hz] = external clock [Hz] / 768
Command
ICSET
OSCIN_EN
(Internal signal )
(
Internal clock mode
External clock mode
Internal oscillation
( Internal signal )
External clock
( OSCIN )
Figure 13. OSC MODE Switch Timing
Blink Control (BLKCTL)
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
C
1
1
1
0
*
P1 P0
( * : Don‟t care)
Set blink mode
Blink mode (Hz)
P1 P0 Reset initialize condition
OFF
0
0
○
0.5
0
1
1
1
0
2
1
1
The Blink frequency varies depending on fCLK characteristics at internal clock mode.
Refer to Oscillation Characteristics for fCLK.
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TSZ02201-0P4P0D301050-1-2
8. Feb. 2016 Rev.001