BD9161FVM_12 Datasheet, PDF (8/19 Pages) Rohm – 2.5V to 4.5V, 0.6A 1ch Synchronous Buck Converter Integrated FET

BD9161FVM
Datasheet
●Application Information
Operation
BD9161FVM is a synchronous rectifying step-down switching regulator that achieves faster transient response by
employing current mode PWM control system. It utilizes switching operation in PWM (Pulse Width Modulation) mode for
heavier load, while it utilizes SLLM^TM (Simple Light Load Mode) operation for lighter load to improve efficiency.
○Current mode PWM control
Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback.
・PWM (Pulse Width Modulation) control
The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a P-channel MOS FET (while a
N-channel MOS FET is turned OFF), and an inductor current IL increases. The current comparator (Current Comp)
receives two signals, a current feedback control signal (SENSE: Voltage converted from IL) and a voltage feedback
control signal (FB), and issues a RESET signal if both input signals are identical to each other, and turns OFF the
P-channel MOS FET (while a N-channel MOS FET is turned ON) for the rest of the fixed period. The PWM control
repeats this operation.
・SLLM^TM (Simple Light Load Mode) control
When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching
pulse is designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation
without voltage drop or deterioration in transient response during the mode switching from light load to heavy load or
vise versa.
Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current
Comp, it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching
is tuned OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces
the switching dissipation and improves the efficiency.
・100% Duty control
Max duty is 100%. (@ Pch MOS FET always ON) In usual PWM control, in case output voltage cannot keep (ex, drop
of input voltage), oscillation frequency becomes lower and finally it becomes 100% duty. The output voltage is a value
that depends only by on a voltage hang from the input voltage to Pch MOS FET, and can keep the output voltage even
with the low input voltage.
VOUT
SENSE
Current
Comp
Level FB
Shift
Gm Amp.
RESET
RQ
SET _S
OSC
ITH
Driver
Logic
IL
SW
Load
VOUT
Current
Comp
SET
RESET
SW
IL
VOUT
Fig.19 Diagram of current mode PWM control
PVCC
SENSE
FB
GND
Current
Comp
SET
GND
GND
RESET
SW
IL(AVE)
IL
VOUT(AVE)
VOUT
PVCC
SENSE
FB
GND
GND
GND
0A
VOUT(AVE)
Fig.20 PWM switching timing chart
Not switching
Fig.21 SLLM^TM switching timing chart
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TSZ02201-0J3J0AJ00190-1-2
02.MAR.2012 Rev.001