BD91361MUV Datasheet, PDF (7/18 Pages) Rohm – Output 2A More High-efficiency Step-down Switching Regulator with Built-in Power MOS FET

BD91361MUV
Technical Note
●Operation
BD91361MUV is a synchronous rectifying step-down switching regulator that achieves faster transient response by
employing current mode PWM control system. It utilizes switching operation in PWM (Pulse Width Modulation) mode for
heavier load, while it utilizes SLLM (Simple Light Load Mode) operation for lighter load to improve efficiency.
○Synchronous rectifier
It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC,
and its P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power
dissipation of the set is reduced.
○Current mode PWM control
Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback.
・PWM (Pulse Width Modulation) control
The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a highside MOS FET (while a lowside
MOS FET is turned OFF), and an inductor current IL increases. The current comparator (Current Comp) receives two
signals, a current feedback control signal (SENSE: Voltage converted from IL) and a voltage feedback control signal
(FB), and issues a RESET signal if both input signals are identical to each other, and turns OFF the highside MOS FET
(while a lowside MOS FET is turned ON) for the rest of the fixed period. The PWM control repeat this operation.
・SLLM^TM (Simple Light Load Mode) control
When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching pulse
is designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation without
voltage drop or deterioration in transient response during the mode switching from light load to heavy load or vise versa.
Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current
Comp, it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching is
tuned OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces the
switching dissipation and improves the efficiency.
SENSE
VOUT
Current
Comp
RESET
Level
RQ
Shift _FB
Gm Amp.
SET _S
ITH
OSC
Driver
Logic
IL
SW
Load
VOUT
Fig.23 Diagram of current mode PWM control
Current
Comp
SET
RESET
SW
IL
VOUT
PVCC
SENSE
FB
GND
Current
Comp
SET
GND
GND
RESET
SW
IL(AVE)
IL
VOUT(AVE)
VOUT
Fig.24 PWM switching timing chart
PVCC
SENSE
FB
GND
GND
GND
0A
VOUT(AVE)
Not switching
Fig.25 SLLM^TM switching timing chart
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2010.06 - Rev.A