BD91361MUV Datasheet, PDF (13/18 Pages) Rohm – Output 2A More High-efficiency Step-down Switching Regulator with Built-in Power MOS FET

BD91361MUV
Technical Note
4. Determination of RITH, CITH that works as a phase compensator
As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area
due to a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high
frequency area due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the
power amplifier output with C and R as described below to cancel a pole at the power amplifier.
A
Gain
[dB] ⁰
0
Phase
[deg]
-90
fp(Min.)
fp(Max.)
IOUTMin.
IOUTMax.
fz(ESR)
fp=
1
2π×RO×CO
fz(ESR)=
1
2π×ESR×CO
Pole at power amplifier
When the output current decreases, the load resistance
Ro increases and the pole frequency lowers.
Fig.33 Open loop gain characteristics
fp(Min.)=
1
2π×ROMax.×CO
[Hz]←with lighter load
fp(Max.)=
1
2π×ROMin.×CO
[Hz] ←with heavier load
A
Gain
[dB]
0
0
Phase
[deg]
-90
fz(Amp.)
Zero at power amplifier
Increasing capacitance of the output capacitor lowers the
pole frequency while the zero frequency does not change.
(This is because when the capacitance is doubled, the capacitor
ESR reduces to half.)
fz(Amp.)=
1
2π×RITH×CITH
Fig.34 Error amp phase compensation characteristics
Rf
Cf
VCC
Cin
VOUT
R2
R1
RITH
CITH
EN
PVCC
VCC
ADJ
ITH
VID<1> VID<0> GND,PGND SW
VCC
VCC
Fig.35 Typical application
CBST
L
ESR
CO
VOUT
RO
Stable feedback loop may be achieved by canceling the pole fp (Min.) produced by the output capacitor and the load
resistance with CR zero correction by the error amplifier.
fz(Amp.)= fp(Min.)
1
2π×RITH×CITH
=
1
2π×ROMax.×CO
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13/17
2010.06 - Rev.A