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BU64987GWZ Datasheet, PDF (5/25 Pages) Rohm – Bi-directional VCM driver for Auto focus
BU64987GWZ
Power-up/Power-down Sequence and Function Timing Diagrams
①
②
③
④
VVCDCD
T_reset
T_off
SSCCL
PPSS
0
1
0
EEN
0
1
0
T_EN
T_EN
InItneternrnaall_EENN
0
1
0
1
0
TaTragreget tD_DAACC
RReeffeereennccee_DDAACC
0x200
0x80
TTaargrgete_tDDACA1C
1
RReeffeerreennccee_DDACA1C' 1
( Ex. 0x300 )
TaTargrgeett_DDAACC2 2
RReefeerreenncec_eDDACA1C 1
( Ex. 0xC0 )
0x200
0x80
Figure 4. Timing Diagram
The following commands are shown in Figure , the timing diagram:
1=Power save release, 2=Target DAC code change #1, 3=Reference DAC code change, 4=Target DAC code change #2
Table 1. Power Sequence Timing Delays
Parameter
Time from VDD going high until first 2-wire
Serial Interface command
Time delay for rush current protection
Time delay of last 2-wire Serial Interface
command until VDD going low
Symbol
T_reset
T_EN
T_off
Min
Limit
Typ
Max
Unit
20
-
-
µs
47.5
50
52.5
µs
1.3
-
-
µs
2-wire Serial BUS Format
Write mode(R/W = 0)
Output from Master
Output from Slave
Update
S 0 0 0 1 1 0 0 R/W A PS EN W2 W1 W0 M D9 D8 A D7 D6 D5 D4 D3 D2 D1 D0 A
Read mode
S 0 0 0 1 1 0 0 0 A PS EN W2 W1 W0 M ※ ※ A
Write
Update W (register address)
S 0 0 0 1 1 0 0 1 A PS EN W2 W1 W0 M CD9 CD8 A CD7 CD6 CD5 CD4 CD3 CD2 CD1 CD0 A
S : start signal
A : acknowledge
Read
P : stop signal
nA : non acknowledge
※ : Don`t care
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TSZ02201-0K1K0B601860-1-2
6. Oct.2016 Rev.001