BU97981KV-E2 Datasheet, PDF (37/50 Pages) Rohm – Multi-function LCD Segment Drivers

BU97981xxx Series MAX 196 segments (SEG49xCOM4)
Power ON/OFF Sequence
Display ON/OFF control by INHb terminal is not asynchronous frame cycle.
To prevent incorrect display, malfunction and abnormal current,
VDD must be turned on before VLCD in power up sequence.
VDD must be turned off after VLCD in power down sequence.
Please set INHb terminal ="L" during Power ON/OFF sequence.
Please satisfies VLCD Please satisfies VLCD≥VDD, t1>0ns, t2>0ns
VLCD
t1
10%
VDD
INHｂ
Command
VDD min
SWRST
MODE SET
Display off
Various Setup
RAM WRITE
Blink RAM
WRITE
MDiOspDlaEySoEnT
Figure 27. Power On/Off Sequence
Datasheet
MDiOspDlaEySoE_ｆT_ｆ
t2
10%
VDD min
Integrated Regulator Start-up Sequence
BU97981KV/MUV do not support integrated regulator start-up, during the normal (Vreg unused) display operation.
So, in case, LCD power supply change to Vreg output under the normal operation period, display flickering will occur.
In order to prevent this phenomenon please send MODESET command (Disp on) after REGSET command.
Please satisfies VLCD Please satisfies VLCD≥VDD, t1>0ns, t2>0ns
After SWRST command sending, please send same sequence.
VLCD
t1
10%
t2
10%
VDD
VDD min
INHｂ
Command
SWRST
MODE SET
Display off
Various Setup
REGSET
RAM WRITE
Blink RAM
WRITE
MODE SET
Display on
MDiOspDlaEySoE_ｆT_ｆ
VDD min
Figure 28. Integrated Regulator Start-up Sequence
LED Power Supply On/Off Sequence
In order to prevent irregular current, please start LED power supply after VLCD input and OUTSET2 command
sending.
Please satisfies VLCD Please satisfies VLCD≥VDD, t1>0ns, t2>0ns
VLED
VLCD
t1
10%
VDD
VDD min
INHｂ
Command
SWRST
MODE SET
Display off
Various Setup
OUTSET2
RAM WRITE
Blink RAM
WRITE
MODE SET
Display on
MDiOspDlaEySoE_ｆT_ｆ
t2
10%
VDD min
Figure 29. LED Power Supply On/Off Sequence
www.rohm.com
© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111ï½¥15ï½¥001
37/46
TSZ02201-0A2A0D300110-1-2
10.Apr.2015 Rev.006