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BU9891GUL-W Datasheet, PDF (3/18 Pages) Rohm – WL-CSP EEPROM family Microwire Bus | |||
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BU9891GUL-W
âAction timing characteristics
(Ta=-40~+85â, VCC=2.5~5.5V)
Parameter
SK frequency
SK âHâ time
SK âLâ time
CS âLâ time
CS setup time
DI setup time
CS hold time
DI hold time
Data â1â output delay time
Data â0â output delay time
Time from CS to output establishment
Time from CS to High-Z
Write cycle time
(Ta=-40~+85â, VCC=1.7~2.5V)
Parameter
SK frequency
SK âHâ time
SK âLâ time
CS âLâ time
CS setup time
DI setup time
CS hold time
DI hold time
Data â1â output delay time
Data â0â output delay time
Time from CS to output establishment
Time from CS to High-Z
Write cycle time
âSync data input / output timing
Technical Note
Symbol
fSK
tSKH
tSKL
tCS
tCSS
tDIS
tCSH
tDIH
tPD1
tPD0
tSV
tDF
tE/W
Symbol
fSK
tSKH
tSKL
tCS
tCSS
tDIS
tCSH
tDIH
tPD1
tPD0
tSV
tDF
tE/W
2.5Vâ¦VCCâ¦5.5V
Min.
Typ.
Max.
-
-
2
230
-
-
230
-
-
200
-
-
200
-
-
100
-
-
0
-
-
100
-
-
-
-
200
-
-
200
-
-
150
-
-
150
-
-
5
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
1.7Vâ¦VCCâ¦2.5V
Min.
Typ.
Max.
Unit
-
-
500
kHz
0.8
-
-
us
0.8
-
-
us
1
-
-
us
200
-
-
ns
100
-
-
ns
0
-
-
ns
100
-
-
ns
-
-
0.7
us
-
-
0.7
us
-
-
0.7
us
-
-
200
ns
-
-
5
ms
CS
tCSS
tSK H
tS KL
SK
t DIS
tDI H
DI
t PD0
tPD1
DO(READ)
DO(WRITE)
STATUS VALID
tCS H
tDF
Fig.1 Sync data input / output timing
âData is taken by DI sync with the rise of SK.
âAt read action, data is output from DO in sync with the rise of SK.
âThe status signal at write (READY / BUSY) is output after tCS from the fall of CS after write command input, at the area
DO where CS is âHâ, and valid until the next command start bit is input. And, while CS is âLâ, DO becomes High-Z.
âAfter completion of each mode execution, set CS âLâ once for internal circuit reset, and execute the following action mode.
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3/17
2010.07 - Rev.A
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