BU9728AKV Datasheet, PDF (3/10 Pages) Rohm – LCD driver for segment-type LCDs

Standard ICs
•^{Pin descriptions}
Pin name
Pin NO.
OSC1
1
OSC2
2
V1 ~ V3
VSS
VDD
SCK
3~5
6
7
8
SD
9
BU9728AKV
I/O
Function
I
O
Input / output pins for the internal oscillator. Resistance is connected between
these pins when the internal clock is running. When an external clock is
running, the clock is input from OSC1 and OSC2 is left open.
—
These are power supply pins for LCD drive.
The following relationship must be satisfied: VDD м V1 м V2 м V3 м VSS (Low) .
— This is the VSS power supply pin.
— This is the VDD power supply pin.
I
This is the shift clock input pin for serial data. The contents of the SD pin are
read one bit at a time at the rising edge of SCK.
This is the serial data input pin, used to input display data and commands.
I _{Display data is displayed when this is "1" and not displayed when it is "0".}
CS
10
I
This is the chip select signal input pin. When this pin is LOW, SD input can be
received. The SCK counter is reset when the CS pin goes from HIGH to LOW.
C/D
COM0
COM3
RESET
11
12 ~ 15
16
This signal detects whether the SD input is command or display data. If the pin
I is LOW at the rising edge of the 8th SCK pulse, the input is recognized as
display data, and if HIGH, the input is recognized as command data.
O
These are the common output pins for LCD drive. They are connected to the
LCD panel commons.
This is the reset input pin. When this pin is LOW, the BU9728AKV is initialized.
I _{It resets the address counter and turns the display off.}
SEG0
SEG31
17 ~ 48
O
These are the segment output pins for LCD drive. They are connected to the
LCD panel segments.
•^{Input / output equivalent circuits}
Pin name I / O
Equivalent Circuit
Pin name I / O
Equivalent Circuit
SD
I
SCK
C/D
CS
VDD
IN
GND
SEG0 O
VLCD
SEG31
COM0
OUT
VLCD
OSC1 —
OSC2
COM3
VDD
OSC1
GND
RESET I
OSC2
VDD
IN
GND
GND
3