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BD9885FV_09 Datasheet, PDF (3/5 Pages) Rohm – Silicon Monolithic Integrated Circuit | |||
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ãPackage Dimensions
(Include BURR 10.35)
Device Mark
BD9885FV
ï¼
Lot No.
SSOP-B28 (Unit:mm)
ãBlock Diagram
VCC REG VREF
CT RT
BRT BCT
DUTY
REG
BLOCK
OSC
BOSC
DUTY
BLOCK
STB
STB
SYSTEMãON/OFF
BLOCK
SS
UVLO
VCC
BLOCK
FB1
IS1
F/B
VS1
BLOCKâ
SS
PWM
BLOCKâ
CT
LOGIC
BLOCK
â
VCC
OUTPUT
BLOCKâ
FB2
IS2
F/B
VS2
BLOCKâ¡
SS
PWM
BLOCKâ¡
CT
LOGIC
BLOCK
â¡
VCC
OUTPUT
BLOCKâ¡
GND
PROTECT
BLOCK
COMP1 COMP2 SCP SRT
ãPin Description
Pin No. Pin Name
Function
1
DUTY
Control PWM mode and BURST mode
External resistor from BRT to GND for
2
BRT
adjusting the BURST triangle oscillator
3
BCT
External capacitor from BCT to GND for
adjusting the BURST triangle oscillator
4
RT
External resistor from SRT to RT for
adjusting the triangle oscillator
UVLO
External resistor from SRT to RT for
5
SRT
adjusting the triangle oscillator
External capacitor from CT to GND for
6
CT
adjusting the triangle oscillator
P1
N1
7
GND
GROUND
8
FB1
Error amplifier outputâ
9
IS1
Error amplifier inputâ
P2
10
VS1
Error amplifier inputâ¡
N2
11
FB2
Error amplifier outputâ¡
PGND
12
IS2
Error amplifier inputâ¢
13
VS2
Error amplifier inputâ£
FAIL
Reference voltage for ISNECE error
14
VREF
amplifier
15
FAIL
Protect clock output
16
STB
Stand-by switch
17
COMP1 Under, over voltage detect for 1ch
18
COMP2 Under, over voltage detect for 2ch
19
UVLO
External Under Voltage Lock OUT
20
REG
Internal regulator output
External capacitor from SS to GND for Soft
21
SS
Start Control
22
SCP
External capacitor from SCP to GND for Timer
Latch
23
P2
FET driver for 2ch
24
N2
FET driver for 2ch
25
PGND
Ground for FET drivers
26
N1
FET driver for 1ch
27
P1
FET driver for 1ch
28
VCC
Supply voltage input
REV. B
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