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BU97930MUV_15 Datasheet, PDF (24/32 Pages) Rohm – Multifunction LCD Segment Driver
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BU97930MUV MAX 108 segments (SEG27×COM4)
●Power ON / OFF sequence
Display ON/OFF control by INHb terminal is not asynchronous with frame cycle.
To prevent incorrect display, malfunction and abnormal current,
VDD must be turned on before VLCD in power up sequence.
VDD must be turned off after VLCD in power down sequence.
Please set INHb terminal ="L" during Power ON/OFF sequence.
Please satisfies VLCD Please satisfies VLCD≥VDD, t1>0ns, t2>0ns
t1
VLCD
10%
VDD
INHb
Command
VDD min
SWRST
MODE SET
Display off
Various Setup
RAM WRITE
Blink RAM
WRITE
MODE SET
Display on
Figure 19. Power On/Off Sequence
t2
10%
VDD min
MODE SET
Display off
●Notes on pull down resistor usage
Satisfy the following sequence if input terminals are pulled down by external resistors (In case MPU output Hi-Z).
CSB
Date transaction period with MPU
Input "L"
period
Input"Hi-Z"
period
SD
SCL
Figure 20. Recommended sequence when input ports are pulled down
BU97930MUV adopts a 5V tolerant I/O for the digital input. This circuit includes a bus-hold function to keep HIGH level. A
pull down resistor of below 10KΩshall be connected to the input terminals for transitions from HIGH to LOW because the
bus-hold transistor turns on during the input‟s HIGH level. (Refer to the Figure 5; I/O Equivalent Circuit)
A higher resistor than 10KΩ(approximate) causes input terminals being steady by intermediate potential between HIGH
and LOW level so unexpected current is consumed by the system.
The potential depends on the pull down resistance and bus-hold transistor‟s resistance.
As the bus-hold transistor turns off upon the input level is cleared to LOW, a higher resistor can be used as a pull down
resistor if MPU sets SD and SCL lines to LOW before it releases the lines.
The LOW period preceding MPU‟s bus release shall be at least 50ns as same as a minimum CLK width ( tSLW ).
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