BD9634GU Datasheet, PDF (23/30 Pages) Rohm – Switching Regulator ICs

BD9634GU
Operational Notes – continued
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin A
Pin B
C
B
E
Pin B
P⁺
N
N
Parasitic
Elements
P
P⁺
N
N
P Substrate
GND
Parasitic
Elements
N ^P+
N _{P N P}⁺ _N
P Substrate
Parasitic
GND GND
Elements
Figure 1. Example of monolithic IC structure
B
N Region
close-by
C
E
Parasitic
Elements
GND
13. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below
the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
14. Disturbance light
In a device where a portion of silicon is exposed to light such as in a WL-CSP, IC characteristics may be affected due
to photoelectric effect. For this reason, it is recommended to come up with countermeasures that will prevent the chip
from being exposed to light.
15. Board Patterning
・VBAT,VBAT3,VBAT4,VBAT6,VBAT8 must be connected to the power supply on the board.
・VCC must be connected to VOUT1 output on the board.
・ALL PGND and AGND must be connected to GND on the board.
・ALL power supply line and GND terminals must be wired with wide/short pattern in order to achieve the lowest
impedance possible.
16. Peripheral Circuitry
・Use low ESR ceramic capacitor for bypass capacitor and place them as close as possible between power supply and
GND terminals.
・Place external components such as L and C by IC using wide and short PCB trace patterns.
・Draw output voltage from each end of capacitor.
・Causing short circuit at CH1, CH5(Boost) output will overload the external diode and may breakdown the component.
Prepare physical countermeasures by adding poli-switches and fuses to avoid excess current flow.
17. Start-up
・Keep light load condition when starting up the device.
・Switch to PWM mode after CH1 has started up in PFM mode, and the VOUT1 output voltage is stable.
CH2 to CH8 should starts after or simultaneously with PWM mode.
18. Usage of this Product
This IC is designed to be used in DSC/DVD application. When using in other applications, please be sure to consult
with our sales representative in advance.
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TSZ22111・15・001
23/26
TSZ02201-0313AA400620-1-2
26.Apr.2016 Rev.001