BU9897GUL-W_11 Datasheet, PDF (2/17 Pages) Rohm – High Reliability Series Serial EEPROMs WL-CSP EEPROM family I2C BUS

BU9897GUL-W
Technical Note
●Memory cell characteristics (Ta=25℃, Vcc=1.7~5.5V)
Parameter
Limits
Min.
Typ.
Number of data rewrite times ^*1
1,000,000 －
Data hold years ^*1
40
－
*1 Not 100% TESTED
Max.
－
－
Unit
Times
Years
●Electrical characteristics (Unless otherwise specified Ta=-40~85℃, VCC=1.7~5.5V)
Parameter
Symbol
Min
Limits
Typ. Max.
Unit
"H" Input Voltage1
V_IH1
0.7V_CC
－ V_CC+1.0 V
Condition
"L" Input Voltage1
V_IL1
－0.3 － 0.3Vcc V
"L" Output Voltage1
V_OL1
－
－
0.4
V I_OL=3.0mA, 2.5V≦V_CC≦5.5V(SDA)
"L" Output Voltage2
V_OL2
－
－
0.2
V I_OL=0.7mA, 1.7V≦V_CC＜2.5V(SDA)
Input Leakage Current
I_LI
－1
－
1
µA V_IN=0V ~ V_CC
Output Leakage Current
Current consumption
at action
I_LO
－1
－
I_CC1
－
－
I_CC2
－
－
Standby Current
I_SB
－
－
○This product is not designed for protection against radioactive rays.
1
µA V_OUT=0V ~ V_CC(SDA)
2.5
mA
V_CC=5.5V , f_SCL =400kHz, tWR=5ms
Byte Write, Page Write
V_CC=5.5V , f_SCL =400kHz
0.5
mA Random read, Current read,
Sequential read
2.0
µA V_CC=5.5V , SDA・SCL=V_CC, WP=GND
●Action timing characteristics(Unless otherwise specified Ta=-40 ~ 85℃､V_CC=1.7 ~ 5.5V)
Parameter
SCL Frequency
Data clock "High" time
Data clock "Low" time
SDA, SCL rise time *1
SDA, SCL fall time *1
Start condition hold time
Start condition setup time
Input data hold time
Input data setup time
Output data delay time
Output data hold time
Stop condition data setup time
Bus release time before transfer start
Internal write cycle time
Noise removal valid period (SDA,SCL terminal)
WP hold time
WP setup time
WP valid time
*1 : Not 100% TESTED
Symbol
Min.
fSCL
－
tHIGH
0.6
tLOW
1.2
tR
－
tF
－
tHD:STA
0.6
tSU:STA
0.6
tHD:DAT
0
tSU:DAT
100
tPD
0.1
tDH
0.1
tSU:STO
0.6
tBUF
1.2
tWR
－
tI
－
tHD:WP
0
tSU:WP
0.1
tHIGH:WP
1.0
Limits
Typ.
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
－
Max.
Unit
400
kHz
－
µs
－
µs
0.3
µs
0.3
µs
－
µs
－
µs
－
ns
－
ns
0.9
µs
－
µs
－
µs
－
µs
5
ms
0.1
µs
－
ns
－
µs
－
µs
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2/16
2011.10 - Rev.A