BD9137MUV Datasheet, PDF (2/17 Pages) Rohm – High Efficiency Step-down Switching Regulator

●Electrical Characteristics
◎BD9137MUV (Ta=25℃ VCC=PVCC=3.3V, EN=VCC, R₁=10kΩ, R₂=5kΩ, unless otherwise specified.)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
Standby current
ISTB
-
0
10
μA
EN=GND
Active current
ICC
-
250
500
μA
EN Low voltage
VENL
-
GND
0.8
V
Standby mode
EN High voltage
VENH
2.0
Vcc
-
V
Active mode
EN input current
IEN
-
2
10
μA
VEN=3.3V
PWM Low voltage
VPWML
-
GND
0.8
V
SLLM & PWM mode
PWM High voltage
VPWMH
2.0
Vcc
-
V
PWM mode
PWM input current
IPWM
-
2
10
μA
VPWM=3.3V
Oscillation frequency
FOSC
0.8
1
1.2
MHz
High side FET ON resistance
RONH
-
82
115
mΩ
PVCC=3.3V
Low side FET ON resistance
RONL
-
70
98
mΩ
PVCC=3.3V
ADJ Voltage
VADJ
0.788
0.800
0.812
V
ITH SInk current
ITHSI
10
18
-
μA
VADJ=1V
ITH Source Current
ITHSO
10
18
-
μA
VADJ=0.6V
UVLO threshold voltage
VUVLO1
2.400
2.500
2.600
V
VCC=3.3V→0V
UVLO release voltage
VUVLO2
2.425
2.550
2.700
V
VCC=0V→3.3V
Soft start time
TSS
2.5
5
10
ms
Hiccup delay
THP
0.5
1
2
Ms
Cool down time
TCD
8
16
32
ms
Output Short circuit
Threshold Voltage
VSCP
-
0.40
0.56
V
VADJ =0.8V→0V
●Block Diagram, Application Circuit
【BD9137MUV】
4.0±0.1
D9137
0.08 S
Lot No.
S
EN
VCC
VREF
Gm Amp
+
Current
Comp
+
RQ
S
SLOPE
CLK
OSC
VCC
Current
Sense/
Protect
+
Driver
Logic
PVCC
VCC
BST
PVCC
3.3V
Input
SW
Output
C0.2 ^2.1±0.1
1
5
20
6
Soft
UVLO
Start
TSD
SCP
SLLM
select
PGND
GND
16
10
15
1.0
0.5
11
0.25
+0.05
-0.04
(Unit : mm)
Fig.1 BD9137MUV TOP View
ADJ
ITH
RITH _CITH
PWM
R1 R2
Fig.2 BD9137MUV Block Diagram
●Pin No. & function table
Pin
Pin
No. name
1
SW SW pin
2
SW SW pin
3
SW SW pin
4
SW SW pin
Function
5
SW SW pin
6 PVCC Highside FET source pin
7 PVCC Highside FET source pin
8 PVCC Highside FET source pin
9
BST Bootstrapped voltage input pin
10 VCC VCC power supply input pin
Pin
Pin
No. name
Function
11
GND Ground
12
ADJ Output voltage detect pin
13
ITH
GmAmp output pin/Connected phase
compensation capacitor
14
PWM Select SLLM / PWM
(H:PWM mode , L:SLLM & PWM mode)
15
TP.1 Test pin(connect to GND)
16
TP.2 Test pin(connect to GND)
17
EN Enable pin(High Active）
18 PGND Lowside FET source pin
19 PGND Lowside source pin
20 PGND Lowside source pin
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