BD9137MUV Datasheet, PDF (10/17 Pages) Rohm – High Efficiency Step-down Switching Regulator

3. Selection of input capacitor (Cin)
VCC
Cin
VOUT
L
Co
Fig.29 Input capacitor
Input capacitor to select must be a low ESR capacitor of the capacitance
sufficient to cope with high ripple current to prevent high transient voltage. The
ripple current IRMS is given by the equation (5):
√_{VOUT(VCC-VOUT)}
IRMS=IOUT×
VCC
[A]・・・(5)
< Worst case > IRMS(max.)
When Vcc=2×VOUT, IRMS=
IOUT
2
If VCC=3.3V, VOUT=1.8V, and IOUTmax.=3A, (BD9137MUV)
IRMS=2×
√_1.8(3.3-1.8)
3.3
=1.49[ARMS]
A low ESR 22μF/10V ceramic capacitor is recommended to reduce ESR dissipation of input capacitor for better efficiency.
4. Determination of RITH, CITH that works as a phase compensator
As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area due to
a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high frequency area
due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the power amplifier output
with C and R as described below to cancel a pole at the power amplifier.
A
Gain
[dB] ⁰
0
Phase
[deg]
-90
fp(Min.)
fp(Max.)
IOUTMin.
IOUTMax.
fz(ESR)
fp=
1
2π×RO×CO
fz(ESR)=
1
2π×ESR×CO
Pole at power amplifier
When the output current decreases, the load resistance Ro
increases and the pole frequency lowers.
Fig.30 Open loop gain characteristics
fp(Min.)=
1
2π×ROMax.×CO
[Hz]←with lighter load
fp(Max.)=
1
2π×ROMin.×CO
[Hz] ←with heavier load
A
Gain
[dB]
0
0
Phase
[deg]
-90
fz(Amp.)
Zero at power amplifier
Increasing capacitance of the output capacitor lowers the pole
frequency while the zero frequency does not change. (This
is because when the capacitance is doubled, the capacitor
ESR reduces to half.)
fz(Amp.)=
1
2π×RITH×CITH
Fig.31 Error amp phase compensation characteristics
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