BU91R63CH-M3BW Datasheet, PDF (17/37 Pages) Rohm – Low Duty LCD Segment Driver

BU91R63CH-M3BW Max 176 segments (SEG44 x COM4)
All Pixels Control (APCTL)
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
C
1
1
1
1
P2 P1 P0
All display Set ON, OFF
Setup
Normal
All Pixels ON
P1
Reset initialize condition
0
○
1
Setup
P0
Reset initialize condition
Normal
0
○
All Pixels OFF
1
All Pixels ON: All pixels are ON regardless of DDRAM data.
All Pixels OFF: All pixels are OFF regardless of DDRAM data.
This command is valid in Display on status. The data of DDRAM is not changed by this command.
If set both P1 and P0 =”1”, All Pixels OFF will be selected.
P2 is used for P3 of Contrast Setting.
Contrast Setting (EVRSET)
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
C
1
1
0
0
P2 P1 P0
BU91R63CH-M3BW has 16-step Electrical Volume Register (EVR) that can set the best V0 voltage level
(Maximum LCD driving voltage).
Electrical Volume Register (EVR) is set to “0000” in reset initialize condition.
In “0000” condition, V0 output voltage is equal to VLCD input voltage.
Keep Contrast Setting for V0 voltage more than 2.7V only.
Refer to the below table for V0 voltage.
Contrast Setting
(V0 voltage)
P3^(Note)
P2
P1
P0 Reset initialize condition
1.000 * VLCD
0
0
0
0
○
0.975 * VLCD
0
0
0
1
0.950 * VLCD
0
0
1
0
0.925 * VLCD
0
0
1
1
0.900 * VLCD
0
1
0
0
0.875 * VLCD
0
1
0
1
0.850 * VLCD
0
1
1
0
0.825 * VLCD
0
1
1
1
0.800 * VLCD
1
0
0
0
0.775 * VLCD
1
0
0
1
0.750 * VLCD
1
0
1
0
0.725 * VLCD
1
0
1
1
0.700 * VLCD
1
1
0
0
0.675 * VLCD
1
1
0
1
0.650 * VLCD
1
1
1
0
0.625 * VLCD
1
1
1
1
(Note) P3 setting uses P2 of APCTL.
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TSZ22111・15・001
17/33
TSZ02201-0P4P0D301380-1-2
10 Feb. 2016 Rev.001