BU91R63CH-M3BW Datasheet, PDF (14/37 Pages) Rohm – Low Duty LCD Segment Driver

BU91R63CH-M3BW Max 176 segments (SEG44 x COM4)
Detailed Command Description
D7 (MSB) is a command or data judgment bit.
Refer to Command and data transfer method.
C: 0: Next byte is RAM write data.
1: Next byte is command.
Set IC Operation (ICSET)
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
C
1
1
0
1
P2 P1 P0
P2: MSB data of DDRAM address. Please refer to “ADSET” command.
Set software reset execution.
Setup
P1
No operation
0
Software Reset Execute
1
When “Software Reset” is executed, BU91R63CH-M3BW is reset to initial condition.
(Refer to Reset initialize condition)
Don’t set Software Reset (P1) with P2, P0 at the same time.
Set oscillator mode
Setup
P0
Reset initialize condition
Internal clock
0
○
External clock
1
Internal clock mode: OSCIN must be connected to VSS level.
External clock mode: Input external clock from OSCIN terminal.
<Frame frequency Calculation at external clock mode>
DISCTL 80Hz setting: Frame frequency [Hz] = external clock [Hz] / 512
DISCTL 130Hz setting: Frame frequency [Hz] = external clock [Hz] / 315
DISCTL 64Hz setting: Frame frequency [Hz] = external clock [Hz] / 648
DISCTL 200Hz setting: Frame frequency [Hz] = external clock [Hz] / 205
Command
OSCIN_EN
(Internal signal)
Internal oscillation
(Internal signal)
External clock
(OSCIN)
ICSET (OSCMODE)
Internal Clock Mode
External Clock Mode
Figure 12. OSC MODE Switch Timing
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
14/33
TSZ02201-0P4P0D301380-1-2
10 Feb. 2016 Rev.001