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BU97550KV-M Datasheet, PDF (16/72 Pages) Rohm – AEC-Q100 Qualified
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BU97550KV-M
Datasheet
5. 1/3 Duty
(1) When SCL is stopped at the low level
SCE
SCL
SDI 1
0
0
1
0
0
1
0 D1 D2 D3 D4 D5 D6 D7 D8 --- D90 D91 D92 D93 D94 D95 D96 0 --- 0 DR0 DR1 DT0 DT1 DT2 KM0 KM1 KM2 P0 P1 P2 P3 FL FC0 FC1 FC2 FC3 OC SC BU0 BU1 BU2 0
0
0
Device Code
8 bits
Display Data
96 bits
Control Data
53 bits
DD
3 bits
SCE
SCL
SDI 1
0
0
1
0
0
1
0 D97 D98 D99 D100 D101 D102 D103 D104 --- D186 D187 D188 D189 D190 D191 D192 0
0 --- 0
0
0
0 PG1 PG2 PG3 PG4 PG5 PG6 PG7 PG8 PG9 0 PF0 PF1 PF2 PF3 CT0 CT1 CT2 CT3 0
0
1
Device Code
8 bits
Display Data
96 bits
Control Data
53 bits
DD
3 bits
SCE
SCL
SDI 1
0
0
1
0
0
1
0 D193 D194 D195 D196 --- D205 D206 D207 D209 D210 0
0
0
0 --- 0
0
0
0
0
0 WN10 WN11 --- WN17 WN18 WN20 WN21 --- WN27 WN28 WN30 WN31 --- WN37 WN38 WN40 WN41 --- WN47 WN48 0
1
0
Device Code
8 bits
Display Data
96 bits
Control Data
53 bits
DD
3 bits
SCE
SCL
SDI 1
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0 --- 0
0
0
0
0
0
0 WN50 WN51 --- WN57 WN58 WN60 WN61 --- WN67 WN68 WN70 WN71 --- WN77 WN78 WN80 WN81 --- WN87 WN88 WN90 WN91 --- WN97 WN98 0
1
1
Device Code
8 bits
Display Data
96 bits
Control Data
53 bits
DD
3 bits
SCE
SCL
SDI 1
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0 --- 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 --- 0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
Device Code
8 bits
Display Data
96 bits
Control Data
53 bits
DD
3 bits
SCE
SCL
SDI 1
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0 --- 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 --- 0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
Device Code
8 bits
Display Data
96 bits
Control Data
53 bits
DD
3 bits
Figure 15. 3-SPI Data Transfer Format
(Note14)
(Note14) DD is direction data.
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TSZ02201-0P4P0D300980-1-2
30.Mar.2015 Rev.001
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