BU8272GUW Datasheet, PDF (16/18 Pages) Rohm – GPIO Expander IC

BU8272GUW
Technical Note
● Appendix
1. About difference between I2C and 2-Wire
2-wire interface logic uses a normal IN/OUT cell (Hi-Z or only “0” output) instead of an Open-Drain cell in normal I2C interface.
For this reason, the VDDI2C voltage level must be same as the connected other normal I2C masters’. Therefore, any other I2C
slave with same bus level can be connected to the bus.
2 .In case of illegal access ^*1 during 2-Wire data transference
The current data will be canceled and next access is necessary.
*1_{In case of a consecutive Start-condition and Stop-condition occurred.}
In case of Resend-condition or Stop-condition occurred during a slave address or R/W bit witting cycles.
In case of Resend-condition or Stop-condition occurred during data witting cycles.
3. About the handling of the no using GPIO port
Any no using GPIO port must be pulled-up or connected to GND. In order to prevent from any unexpected interrupt happening
when a no using GPIO is connected to GND, the corresponding bit of GPIO Mask register must be disabled by Mask register
access, or simply read the GPIO value into corresponding internal GPIO port register. The no using GPIO port power supply
(VDDIO1 or VDDIO2) must be connected to the voltage value defined in this specification, never left it open.
4. Caution of power on sequence
The BU8272GUW can not works correctly even one of the power supply among the core power supply (VDD) and the I/O power
supply ( VDDI2C, VDDIO1, VDDIO2) is not connected to specified conditions described in this specification.
The power on sequence must be designed to give core power supply first then I/O power. Inversely, the I/O power supply must
be switched off before the core power down in the device power down sequence.
5. Reset release timing
Core power supply (VDD) and I/O power supply (VDDI2C, VDDIO1, VDDIO2) first. Afterwards, release XRST.
VD
VDDI2C _, VDDIO1(2)
Release XRST
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16/17
2009.09 - Rev.A