BU8272GUW Datasheet, PDF (15/18 Pages) Rohm – GPIO Expander IC

BU8272GUW
Technical Note
● The Setting Registers
When setting address is written beyond 00h~09h, the register address will be forced to value 00h.
When the final address is set to 09h, then the next address 00h will be written.
By making XRST “Low”, the setting register value will be initialed shown in following register map.
1. Register map
Addr Init
00h ffh
01h ffh
02h 0fh
03h 00h
04h 00h
05h 00h
06h ffh
07h ffh
08h 0fh
09h 03h
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
D7
GPIO7
GPIO15
-
MASK7
MASK15
-
RWSEL7
RWSEL1
5
-
-
D6
GPIO6
GPIO14
-
MASK6
MASK14
-
RWSEL6
RWSEL1
4
-
-
D5
GPIO5
GPIO13
-
MASK5
MASK13
-
RWSEL5
RWSEL1
3
-
-
D4
GPIO4
GPIO12
-
MASK4
MASK12
-
RWSEL4
RWSEL1
2
-
-
D3
GPIO3
GPIO11
GPIO19
MASK3
MASK11
MASK19
RWSEL3
RWSEL1
1
RWSEL1
9
-
D2
GPIO2
GPIO10
GPIO18
MASK2
MASK10
MASK18
RWSEL2
RWSEL1
0
RWSEL1
8
INTSEL
D1
GPIO1
GPIO9
GPIO17
MASK1
MASK9
MASK17
RWSEL1
RWSEL9
RWSEL1
7
IOSEL2
D0
GPIO0
GPIO8
GPIO16
MASK0
MASK8
MASK16
RWSEL0
RWSEL8
RWSEL1
6
IOSEL1
2. Register functional explanations
Symbol
Addr
Init
GPIO7
～
00h
ffh
GPIO0
GPIO15
～
01h
ffh
GPIO8
GPIO19
～
02h
0fh
GPIO16
MASK7
～
03h
00h
MASK0
MASK15
～
04h
00h
MASK8
MASK19
～
05h
00h
MASK16
RWSEL7
～
06h
ffh
RWSEL0
RWSEL15
～
07h
Ffh
RWSEL8
RWSEL19
～
08h
0fh
RWSEL16
IOSEL1
1h
IOSEL2
09h
1h
INTSEL
0h
Description
Read or write data of GPIO bit 0 to 7.
Read or write data of GPIO bit 8 to 15.
Read or write data of GPIO bit 16 to bit 19.
In writing mode, 4 bits of MSB is ignored and in reading mode, 4 bits of
“0” is filled up from MSB.
0: Interrupt is not masked when “0” is written to GPIO bit 0 to 7
1: Interrupt is masked when “0” is written to GPIO bit 0 to 7
0: Interrupt is not masked When “0” is written to GPIO bit 8 to 15
1: Interrupt is masked When “0” is written to GPIO bit 8 to 15
0: Interrupt is not masked when “0” is written to GPIO bit 16 to 19
1: Interrupt is masked when “0” is written to GPIO bit 16 to 19
In writing mode, 4 bit of MSB is ignored and in reading mode, 4 bits of
“0” is filled up from MSB.
0: GPIO bit 0 through 7 becomes output mode.
1: GPIO bit 0 through 7 becomes input mode.
0: GPIO bit 8 through 15 becomes output mode.
1: GPIO bit 8 through 15 becomes input mode.
0: GPIO bit 16 through 19 becomes output mode.
1: GPIO bit 16 through 19 becomes input mode.
0: RWSEL bit 0 through 7 becomes available.
1: Change to pull-up mode.
0: RWSEL bit 8 through 19 becomes available.
1: Change to pull-up mode.
0: Make Interrupt “Low active”.
1: Make Interrupt “High active”.
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2009.09 - Rev.A