BU2373FV_11 Datasheet, PDF (16/19 Pages) Rohm – High Performance VCOs for Image Sampling

BU2373FV,BU2374FV
Technical Note
・Where, find the Gain for the open loop of PLL system. Assuming that the transfer function is H(s),
H(s)= Kp×F(s)×
Kv
S
×
1
N
Kp×
Kv
S
×
1
N
=
S×
1
N
Kp×Kv
G0=
2πf×N ²
Kp×Kv
, ^{θ0= -tan-1(2πf・}
N
Kp×Kv
)=
π
2
PLL-Gain=20・log｛
G2
G1×G3×G0
｝ _, Phase=-θ0+θ2-θ1-θ3
Gain(dB)
<Gain>
<Phase>
φ
f_C1
f_C2
f_C3
f
π/2
f
f_C1
f_C2
f_C3
π
Fig.70 (Fig.58) Frequency  Gain Characteristics
Fig.71 (Fig.58) Frequency  Phase Characteristics
If, by the expression above, the LPF constant is selected so that a phase margin of 45 or more is secured when the
Gain for the open loop becomes 0 dB, the PLL system will stably function.
Note)
・As to the jitters, the TYP values vary with the substrate, power supply, output loads, noises, and others. Besides, for the
use of the BU2373FV or the BU2374FV, the operating margin should be thoroughly checked.
・The Analog power supply and the Logic power supply should be separated from each other so that noises generated with
the Logic power supply have no adverse influences on the Analog power one.
・Bypass capacitors between the power supply and GND should be mounted as close as possible.
・Power to control pins (i.e., VCO_INHIBIT, PFD_INHIBIT and SELECT) should be supplied from the logic power supply.
・In order to configure the PLL system, the LPF GND should be connected to the Analog GND and mounted in the
proximity of the VCO_IN.
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16/18
2011.08 - Rev.B