BU2373FV_11 Datasheet, PDF (10/19 Pages) Rohm – High Performance VCOs for Image Sampling

BU2373FV,BU2374FV
Technical Note
●Pin assignment function
PIN NO. PIN name
Function
1
LOGIC_VDD
Power supply for the internal Logic and the VCO output,
which should be separated from power supply for the VCO_VDD (analog block).
2
SELECT
VCO output frequency dividing mode selection pin.
H: Frequency dividing output, L: Through output
3
VCO_OUT VCO output pin. If the VCO_INHIBIT is set to “H”, the VCO_OUT will be fixed to L.
4
FIN-A
Reference frequency input pin
5
FIN-B
VCO block frequency dividing input pin,
which inputs after the VCO output frequency is divided through the external counter.
6
PFD_OUT
Phase comparator output pin. If the PFD_INHIBIT is set to “H”,
the PFD_OUT will be set to Hi-Z output.
7
LOGIC_GND GND for the internal Logic and the VCO output
8
TEST
Test mode pin, which is normally used with set to OPEN or fixed to L.
Equipped with Pull-down resistor.
9
PFD_INHIBIT
Phase comparator inhibit control pin.
If the PFD_INHIBIT is set to “H”, the PFD_OUT will be set to Hi-Z output.
10
VCO_INHIBIT
VCO inhibit control pin.
If the VCO_INHIBIT is set to “H”, the VCO_OUT will be fixed to L output.
11
VCO_GND GND for VCO (Analog block GND)
12
VCO_IN
VCO control pin, to which loop filter output
for the PLL system is connected due to frequency control on normal system.
13
BIAS
Bias current setting pin for the shift of VCO oscillation range.
A resistor is connected to the VCO_VDD for the control of bias current.
14
VCO_VDD VDD for VCO (power supply for analog block)
●Example of application circuit
H:VCO_OUT divide
L：VCO_OUT normal
1/N
Divider
Please separate completely the bypass capacitor between an analog power supply and
GND from a digital power supply and GND. Please insert an about 0.01µF bypass
capacitor near the pin as much as possible.
1 LOGIC_VDD
VCO_VDD 14
Please adjust so that the voltage of VCO_IN
is set to 1/2VDD.
2 SELECT
BIAS 13
3 VCO_OUT
VCO_IN 12
4 FIN_A
VCO_GND 11
5 FIN_B
VCO_INHIBIT 10
6 PFD_OUT
PFD_INHIBIT 9
7 LOGIC_GND
TEST 8
recommend a lug lead filter.
R2
R1
C1
C2
H:VCO_OUT disable
L:VCO_OUT enable
H:PFD_OUT disable
L:PFD_OUT enable
The bypass capacitor between a digital power supply and GND should set aside
an analog power supply and GND. Please insert an about 0.01uF bypass
capacitor near the pin as much as possible.
Fig.51
* It is recommended to use bypass capacitors of good high-frequency characteristics.
* It is recommended to apply power supply in the LOGIC_VDD and LOGIC_GND circuits for the SELECT. PFD_INHIBIT, and VCO_INHIBIT control pins.
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10/18
2011.08 - Rev.B