BU90R104 Datasheet, PDF (15/18 Pages) Rohm – 35bit LVDS Receiver 5:35 DeSerializer

BU90R104
Technical Note
●10bit Small Swing Input & LVCMOS Level Output
Example:
BU8254KVT : LVCMOS level input/Falling edge/LVDS normal(350mV) swing output
BU90R104 : LVCMOS level output/Falling edge
VDD
F.Bead *3
F.Bead *3
0.1uF
0.01uF
CLKIN
R4
R5
R6
R7
R8
R9
G4
G5
G6
G7
G8
G9
B4
B5
B6
B7
B8
B9
HSYNC
VSYNC
DE
R2
R3
G2
G3
B2
B3
R0
R1
G0
G1
B0
B1
XRST
*4
VDD
GND
LVDS
VDD
0.1uF
0.01uF
CLKIN
TA0
LVDS
TA1
GND
TA2
TA3
TA4
PLL VDD
TA5
TA6
TB0
TB1
PLL GND
0.1uF
0.01uF
TB2
TB3
TAN
TB4
TB5
TAP
TB6
TC0
TBN
TC1
TC2
TBP
TC3
TC4
TCN
TC5
TC6
TCP
TD0
TD1
TD2
TD3
BU8254KVT ^TCLKN
TCLKP
TD4
TD5
TDN
TD6
TE0
TDP
TE1
TE2
TEN
TE3
TE4
TEP
TE5
TE6
XRST
RS*4
R/F
100Ωtwist
pair Cable
or
PCB trace
LVDD
VDD
GND
0.1uF
0.01uF
LGND
0.1uF
0.01uF
100Ω
100Ω
100Ω
100Ω
100Ω
100Ω
PVDD
PGND
RA-
RA+
RB-
RB+
RC-
RC+
RCLK-
RCLK+
RD-
RD+
RE-
RE+
CLKOUT
RA0
RA1
RA2
RA3
RA4
RA5
RA6
RB0
RB1
RB2
RB3
RB4
RB5
RB6
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RD0
BU90R104
RD1
RD2
RD3
RD4
RD5
RD6
RE0
RE1
RE2
RE3
RE4
RE5
RE6
PD
OE
DK
R/F
PCB(Transmitter)
PCB(Receiver)
VDD
0.1uF
0.01uF
CLKOUT
R4
R5
R6
R7
R8
R9
G4
G5
G6
G7
G8
G9
B4
B5
B6
B7
B8
B9
HSYNC
VSYNC
DE
R2
R3
G2
G3
B2
B3
OPEN
R0
R1
G0
G1
B0
B1
OPEN
PD
OE
*3 Recommended Parts:
F.Bead : BLM18A-Series (Murata Manufacturing Co.)
*4 : RS pin acts as VREF input pin when input voltage is set to half of high level signal input.
We recommend to locate by-pass condenser near the RS pin.
V_DD
R1 15k
R2 5.6k
RS pin.
C1=0.1µF
Example for LVTTL(1.8V input):(R1,R2)=(15kΩ,5.6kΩ)
Fig.14
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2011.02 - Rev.A