BU90R104_15 Datasheet, PDF (14/22 Pages) Rohm – 35bit LVDS Receiver

BU90R104
●Application Circuit (10bit LVCMOS Level Input & LVCMOS Level Output)
Example:
BU8254KVT : LVCMOS level input/Falling edge/LVDS normal(350mV) swing output
BU90R104 : LVCMOS level output/Falling edge
VDD
F.Bead ^(Note4)
F.Bead ^(Note4)
0.1uF
0.01uF
CLKIN
R4
R5
R6
R7
R8
R9
G4
G5
G6
G7
G8
G9
B4
B5
B6
B7
B8
B9
HSYNC
VSYNC
DE
R2
R3
G2
G3
B2
B3
R0
R1
G0
G1
B0
B1
XRST
VDD
0.1uF
VDD
GND
LVDS VDD
0.1uF
0.01uF
CLKIN
TA0
TA1
LVDS GND
TA2
TA3
TA4
PLL VDD
TA5
TA6
PLL GND
0.1uF
TB0
TB1
0.01uF
TB2
TB3
TAN
TB4
TB5
TAP
TB6
TC0
TBN
TC1
TC2
TBP
TC3
TC4
TCN
TC5
TC6
TCP
TD0
TD1
TD2
TD3
TCLKN
BU8254KVT
TCLKP
TD4
TD5
TDN
TD6
TE0
TDP
TE1
TE2
TEN
TE3
TE4
TEP
TE5
TE6
XRST
RS^(Note5)
R/F
100Ωtwist
pair Cable
or
PCB trace
LVDD
0.1uF
0.01uF
LGND
0.1uF
0.01uF
100Ω
100Ω
100Ω
100Ω
100Ω
100Ω
PVDD
PGND
RA-
RA+
RB-
RB+
RC-
RC+
RCLK-
RCLK+
RD-
RD
+
RE-
RE+
VDD
GND
CLKOUT
RA0
RA1
RA2
RA3
RA4
RA5
RA6
RB0
RB1
RB2
RB3
RB4
RB5
RB6
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RD0
B90R104
RD1
RD2
RD3
RD4
RD5
RD6
RE0
RE1
RE2
RE3
RE4
RE5
RE6
PD
OE
DK
R/F
PCB(Transmitter)
PCB(Receiver)
Datasheet
VDD
0.1uF
0.01uF
CLKOUT
R4
R5
R6
R7
R8
R9
G4
G5
G6
G7
G8
G9
B4
B5
B6
B7
B8
B9
HSYNC
VSYNC
DE
R2
R3
G2
G3
B2
B3
OPEN
R0
R1
G0
G1
B0
B1
OPEN
PD
OE
（Note4）Recommended Parts:
F.Bead : BLM18A-Series (Murata Manufacturing Co.)
（Note5）If RS pin is tied to VDD, LVDS swing is 350 mV.
If RS pin is tied to GND, LVDS swing is 200 mV.
Figure 13. Application Circuit (10bit LVCMOS Level Input & LVCMOS Level Output)
●About the no used differential inputs
If there are no used differential inputs, be sure to set them into GND level.
The outputs are fixed High level, when differential inputs set GND.
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TSZ22111・15・001
14/18
TSZ02201-0L2L0H500030-1-2
27.Feb.2015 Rev.002