BU97520AKV-M Datasheet, PDF (12/44 Pages) Rohm – AEC-Q100 Qualified

BU97520AKV-M
5. DT: 1/4-Duty drive or 1/3-Duty drive control data
This control data bit selects either 1/4-Duty drive or 1/3-Duty drive.
DT
Duty Drive Scheme
0
1/4-Duty drive
1
1/3-Duty drive
Datasheet
6. FC0, FC1, FC2: Common/segment output waveform frame frequency control data
These control data bits set the frame frequency for common and segment output waveforms.
FC0
FC1
FC2
Frame Frequency fo(Hz)
0
0
0
fosc^(Note10)/12288
0
0
1
fosc/10752
0
1
0
fosc/9216
0
1
1
fosc/7680
1
0
0
fosc/6144
1
0
1
fosc/4608
1
1
0
fosc/3840
1
1
1
fosc/3072
(Note10) fosc: Internal oscillation frequency (600 [kHz] typ.)
7. OC: Internal oscillator operating mode/External clock operating mode control data
This control data bit selects the oscillation mode.
OC
Operating Mode
In/Out Pin(S69/OSC) Status
0
Internal oscillator
S69 (segment output)
1
External Clock
OSC (clock input)
8. SC: Segment on/off control data
This control data bit controls the on/off state of the segments.
SC
Display State
0
On
1
Off
Note that when the segments are turned off by setting SC to “1”, the segments are turned off by outputting segment off
waveforms from the segment output pins.
9. BU: Normal mode/power-saving mode control data
This control data bit selects either normal mode or power-saving mode.
BU0 BU1 BU2 Mode
OSC Oscillator
Segment outputs
Common outputs
0
0
0 Normal
Operating
Operating
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
Power-
saving
Stopped
Low(VSS)
1
1
0
1
1
1
Power-saving mode status:
S1/P1/G1 to S6/P6/G6 = active only General Purpose output
S7 to S69 = low(VSS)
COM1 to COM4 = low(VSS)
Stop the LCD drive bias voltage generation circuit
Stop the Internal oscillation circuit
However, serial data transfer is possible during Power-saving mode.
Output Pin States During Key Scan Standby
KS1 KS2 KS3 KS4 KS5 KS6
H
H
H
H
H
H
L
L
L
L
L
H
L
L
L
L
H
H
L
L
L
H
H
H
L
L
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
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TSZ02201-0P4P0D300570-1-2
19.Mar.2015 Rev.006