BD9757MWV_10 Datasheet, PDF (12/24 Pages) Rohm – Switching Regulator IC

BD9757MWV
Technical Note
●Block explanation
1. VREGA
It is a regulator with output voltage of 2.5V and used as a power supply of internal block. In addition, it outputs to
outside from VREGA terminal (32pin). 1.0μF is recommended as an external capacitor for oscillation prevention.
2. SCP, Timer Latch
It is a timer latch type of short-circuit protection circuit.
For CH1,2, 6 ~ 8, the error AMP output voltage is monitored, and detected when the feedback voltage deviates from
control, for CH3 ~ 5, it is detected when the voltage of INV terminal becomes lower than 80%, and in 25ms the latch
circuit operates and the outputs of all the channels are fixed at OFF.
In order to reset the latch circuit, please turn off all the STB terminals before turning them on once again or turning
power supply on once again.
3. U.V.L.O (Under Voltage Lockout)
It is a circuit to prevent malfunction at low voltage.
It is to prevent malfunction of internal circuit at the time of rising or dropping to a lower value of power supply voltage.
If the voltage of VCCOUT terminal becomes lower than 2.4V, then the output of each DC/DC converter is reset to OFF,
and SCP’s timer latch & soft start circuit are reset. When control is deviated from, the operation of CH1 at the time of
start-up will be explained in START UP OSC mentioned later.
4. Voltage Reference (VREF6)
For the reference voltage circuit of CH6 inversion CH, the output voltage is 1V and outputted from VREF6 terminal
(30pin). According this voltage and the output voltage of CH6, the dividing resistance (resistor) is set and then the
output voltage is set. If STB6 terminal is made to be H level at the time of start-up, then increase gradually the voltage
up to 1V. The inversion output of CH6 follows this voltage and performs the soft start. 1.0μF is recommended as the
external capacitor.
5. OSC
It is an oscillation circuit the frequency of which is fixed by a built-in CR.
The operating frequencies of CH1 ~ CH5 are set at 1.2MHz, and the operating frequencies of CH6 ~ CH8 are set at
600kHz.
6. ERRAMP 1 ~ 8
It is an error amplifier to detect output signal and output PWM control signal. The reference voltages of ERRAMP
(Error Amplifier) of CH1, 2,3,4,5 are internally set at 0.8V, and the reference voltages of ERRAMP (Error Amplifier) of
CH7.8 are set at 1.0V. The reference voltage of CH6 is set at GND potential, and for CH8’s ERRAMP81, the maximum
value of the reference voltage is set at 0.4V. In addition, each CH incorporates a built-in element for phase
compensation.
7. ERRCOMP , Start Up OSC
It is a comparator to detect the output voltage and control the start circuit, and also an oscillator that is turned ON/OFF
by this comparator and starts operating from 1.5V. The frequency of this oscillator is about 300 kHz fixed internally. This
oscillator stops operating if VCC terminal becomes more than 2.6V or the soft start time is exceeded.
8. Current mode control block
CH1 ~ 5 adopt the PWM method based on current mode.
For a current- mode DC/DC converter, FET at the main side of synchronous rectification is turned on when detecting
the CLK’s edge, and turned off by detecting the peak current by means of the current comparator.
9. PWM COMP
PWM converter is a voltage-pulse width converter to control output voltage according to input voltage. It compares the
output voltage of error amplifier with the SLOPE waveform, controls the pulse width and outputs to driver. The driver is
turned on during the output of error amplifier being higher than SLOPE waveform. The maximum ON duty is set at
about 92% internally.
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12/20
2010.11 - Rev.A