BD9397EFV_15 Datasheet, PDF (12/31 Pages) Rohm – White LED Driver for large LCD panel

BD9397EFV
Datasheet
37pin. LSP
Terminal which sets LED SHORT detection voltage: The input
impedance of LSP pin is High Impedance, because it is
assumed that the input of LSP terminal is set by dividing the
resistance with a high degree of accuracy.
The LSP terminal is assumed that it is set by dividing the
resistance with a high degree of accuracy, LSP terminal inside
the IC is in open state (High Impedance). It is necessary to input
voltage to divide the resistance from the output of REG9V or use
external power source. Using the terminal in open state needs to
be avoided. Set LSP voltage in the range of 0.8V to 3.0V.
+
-
AMP
-
-
-
-
-
REG9V
LED_LV
LED1
LED2
LED3
LED4
LED _SHORT  5  VLSP [V ]
LED5
LED6
LED_SHORT：LSP detection Voltage, VLSP：LSP terminal voltage
+
The conditions there are restrictions on short LED detection. For
-
details, see the explanation of section ●3.5.2 Setting the LED
+
short detect voltage (LSP pin).
-
S1
+
.
-
S2
+
S3
38pin. FAIL_MODE
-
Output mode of FAIL can be change by FAIL_MODE terminal.
+
-
S4
When FAIL_MODE is in Low state, the output of FAIL terminal is
+
S5
the latch mode. FAIL terminal is latched after the CP charge time
-
from detection of abnormal state. When FAIL_MODE is in High
S6
Figure 18.
state, the output of FAIL terminal is one-shot-pulse mode. At detected abnormality, firstly FAIL is in Low state (Drain state).
FAIL returns to High state (Open state) if abnormality is cleared after CP charge time, In this mode, there is no latch stop for
protection operation in IC. Monitoring the FAIL with the Microcomputer, decide to stop working IC.
For FAIL_MODE = H when the detection sequence, see the explanation of section ●3.8.3 Protective operation sequence at
FAIL_MODE=H. On application to change modes is prohibited.
39pin. UVLO
UVLO terminal of the power of step-up DC/DC converter: at 2.5 V (typ.) or higher, IC starts step-up operation and stops at
2.4V or lower (typ.). (It is not shutdown of IC.) UVLO can be used to perform a reset after latch stop of the protections.
The power of step-up DC/DC converter needs to be set detection level by dividing the resistance. If any problem on the
application causes noise on UVLO terminal which results in unstable operation of DC/DC converter, a capacitance of
approximately 1000 pF needs to be connected between UVLO and AGND terminals.
40pin. AGND
Analog GND for IC
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TSZ22111・15・001
12/27
TSZ02201-0F1F0C100330-1-2
1.Sep.2015 Rev.006