BD9123MUV_14 Datasheet, PDF (12/28 Pages) Rohm – Synchronous Buck Converter with Integrated FET

BD9123MUV
Datasheet
3. About Setting the Output Voltage
Output voltage shifts step by step as often as bit setting to control the overshoot/undershoot that occurs when changing the
of output voltage value. 8 steps (max) delay will occur from the bit switching until output voltage reach to setting value.
VID<2:0>
(0,0,1)
(1,1,1)
1.2V
V_OUT
0.85V
tVID (max)=0.06ms
(a) Switching 3 bit synchronously
VID<2>
VID<1>
VID<0>
Count STOP
VOUT
5µs(max)
About 10µs from bit switching
(c) Switching 3 bit with the time lag
VID<2>
VID<1>
VID<0>
(b) Switching 3 bit with the time lag
V2D〈2〉
〈1〉
〈0〉
Count STOP
VOUT
About 10µs from bit switching
Count STOP
VOUT
About 10µs from switching the last bit
Figure 28. Timing Chart of Setting the Output voltage
It is possible to set output voltage, shown in diagram 1 below, by setting VID<0> to <2> 0 or 1.
VID<2:0> terminal is set to VID<2:0>=(0,0,0) originally by the pull down resistor while in high impedance inside IC.
By pulling up/ pulling down about 10kΩ, the original value can be changed optionally.
Table of output voltage setting
VID<2>
VID<1>
VID<0>
VOUT
0
0
0
1.0V
0
0
1
0.85V
0
1
0
0.9V
0
1
1
0.95V
1
0
0
1.05V
1
0
1
1.1V
1
1
0
1.15V
1
1
1
1.2V
(Note) After 10µs(max) from the bit change, VOUT change starts.
Requiring time for one step (50 mV shift) of VOUT is 5µs(max).
From the bit switching until output voltage reach to setting value, tVID(max)=0.06ms delay will occur.
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