BD9285F Datasheet, PDF (11/39 Pages) Rohm – Boost 1channel white LED driver For large LCDs

BD9285F
Datasheet
is decreased, on the other hand, the transient response is delayed.
And please keep in mind the error voltage if the pull down resistor of ADIM pin will be connected.
○Pin9: ADIM_P
The pulse signal input pin for analog dimming. Please pull up the voltage level more than 4.2V(typ.), when DC signal is
used for the analog dimming. In normal operation, please set the input voltage under 5.6V. For more details, please refer
to <ADIM> pin descriptions.
The input frequency of this pin assumed from 2kHz to 100kHz. Please keep in mind that the capacitor of ADIM pin is
small considering of this input frequency, the error of LED current can be cause.
○Pin10: GND
GND pin of IC.
○Pin11: DIMOUT
This is the output pin for external NMOS of dimming. The below table shows the rough output logic of each operation
state, and the output H level is VCC. Please refer to the time chart in the section 3.7 for detail explanations, because The
DIMOUT logic has the exceptional behavior. Please insert the resistance between the dimming MOS gate to improve the
over shoot of LED current, as PWM turns from low to high.
Status
Normal
Abnormal
DIMOUT output
PWM1 and PWM2
GND Level
○Pin12: GATE
This is the output terminal for driving the gate of the boost MOSFET. The high level is VCC of IC. Frequency can be set
by the resistor connected to RT. Please refer to the <RT> pin description for the frequency setting.
○Pin13: STB
ON/OFF setting terminal for IC, which can be used to perform a reset at shutdown. Please reset this pin after latch off.
Regarding of the sequence of turning on, if the input logic STB turns from low to high, the internal power supply is
activated. After the positive edge of PWM is input , BD9285 starts the boost operation.
○ The input voltage of STB pin toggles the IC state(IC ON/OFF). Please avoid the use of the intermediate level (from
0.8V to 2.2V).
Regarding of the power down sequence, while STB=L and TC54UVLO=H, in order to discharge the output voltage,
DIMOUT logic can assert high, depending on the PWM logic. This discharge behavior is separately described in the time
chart in the section 3.7.3, or in the section 3.4.2, ”how to shutdown and set TC54 capacitance”
○Pin14: VCC
Power supply pin of IC. Input range is from 9V to 18.0V.
The operation starts more than 7.5 V(TYP.) and shuts down less than 7.2 V(TYP.).
○Pin15: ISENSE
This is the input terminal for the current detection. The error amplifier compares
the lower voltage the analog dimming pin ADIM and 3.5V. The abnormal voltage
of this pin activates the protection function of LED, such as LEDOCP, OPEN.
[LED OCP Protection Function]
More than ISENSE = 4.0V (typ.), the over current of LED (LEDOCP) will be
detected. If that states continues 4096 clock of GATE pin, IC will latch off.
(Please refer to the time chart in the section 3.7.8.)
[LED OPEN Protection Function]
If OPEN state (ISENSE<0.1V) continues during 4 clocks interval of GATE
terminal, BD9285 starts to count the interval of the abnormal state. In that
counting state, DIMOUT logic keeps high output no matter what PWM logic so
that the OPEN abnormal state can be detected continuously. If the abnormal
condition continues by the completion of counting, BD9285 will be latched off.
(Please refer to the time chart in the section 3.7.7.)
Exceptionally the OPEN protect detection are masked in the following conditions,
CASE1. When PWM = L. ISENSE is less than 0.1V even in normally, because
DIMOUT = L.
CASE2. In the soft-start interval. ISENSE is less than 0.1V, because of the
insufficient output voltage Vout.
Vout
DIMOUT
Error AMP
ISENSE
3.5V _ADIM
FB
Figure 14. ISENSE pin circuit
○Pin16: FB
This is the output terminal of error amplifier. Monitoring the ISENSE terminal voltage, this pin outputs the error signal with
the analog dimming signal (pin ADIM) or 3.5V.
After the completion of the SS, this pin outputs high impedance as the logic “PWM1 and PWM2” asserts low. FB voltage
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TSZ22111・15・001
11/36
TSZ02201-0F1F0C100030-1-2
11.Jul.2012 Rev.001