BD9483F Datasheet, PDF (10/32 Pages) Rohm – White LED Driver for large LCD Panels (DCDC Converter type)

BD9483F,FV
Datasheet
DIMOUT1 （6 PIN）, DIMOUT2 (20 PIN)
This is the output pin for external NMOS of dimming. The below table shows the rough
output logic of each operation state, and the output H level is REG90. DIMOUT1 and
DIMOUT2 are the output corresponding to PWM1 and PWM2. Please refer to the time
chart in the section 3.7 for detail explanations, because The DIMOUT logic has the
exceptional behavior. Please insert the resistance between the dimming MOS gate to
improve the over shoot of LED current, as PWM turns from low to high.
Vout
REG90
DIMOUT ^RDIM
Status
Normal
Abnormal
DIMOUT1 output
PWM1
Low Level
DIMOUT2 output
PWM2
Low Level
ISENSE1 （7 PIN）, ISENSE2 (19 PIN)
This is the input terminal for the current detection. The error amplifier compares the
ISENSE and the 1/3 of ADIM pin voltage. And the clamped level of ISENSE feedback
is 1.0V.
○LED OCP Protection Function
More than ISENSE = 3.0V (typ.), the over current of LED (LEDOCP) will be detected.
The GATE pulse will be stopped, the DIMOUT is forced to output high level to monitor
the error state. If the detection continues to 4 count of GATE frequency, IC will be
latched off. (Please refer to the time chart 3.7.6)
FB1 （8 PIN）, FB2 (18 PIN)
This is the output terminal of error amplifier. The input pin of error amplifier is ISENSE
and ADIM.
After the completion of the soft start, this pin outputs high impedance as the
corresponding PWM pin asserts low. FB voltage is hold to the external capacitance.
○FBMAX Protection Function
More than FB = 4.0V (typ.), the error state for the GATE pin duty will be detected,
and the CP charge is started. If the CP charge continues to 3.0V, IC will be latched off.
Please refer to the time chart 3.7.5
(The loop compensation setting is described in the section " ●3.6 loop compensation".)
ISENSE
BD9483
Figure 15.
Vout
DIMOUT
Error AMP
ISENSE
1.00V
FB
Figure 16.
ADIM （9 PIN）
The input pin for analog dimming signal. The ISENSE feedback point is set as 1/3 of this pin bias. If more than 3.0V is
input, ISENSE threshold is clamped as the below diagram.
Figure 17.
PWM1 （10 PIN）, PWM2 （11 PIN）
The ON / OFF input of the LED light. PWM1 and PWM2 controls each LED strings individually. The Duty signal of this pin
can control the PWM dimming.
The high / low level of PWM pins are following.
State
PWM input voltage
PWMx=H
PWMx=2.0V to 5.5V
PWMx=L
PWMx=-0.3V to 0.8V
FAILB （12 PIN）
FAIL signal output pin (open drain). As abnormal, the internal NMOS turn on.
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28.Nov.2013 Rev.003