BR34L02FV-W_09 Datasheet, PDF (1/18 Pages) Rohm – DDR1/DDR2 For memory module) SPD Memory

Double-cell Memory for Plug & Play
DDR1/DDR2
(For memory module) SPD Memory
BR34L02FV-W
●Description
BR34L02FV-W is 256×8 bit Electrically Erasable PROM (Based on Serial Presence Detect)
●Features
1) 256×8 bit architecture serial EEPROM
2) Wide operating voltage range: 1.7V-5.5V
3) Two-wire serial interface
4) High reliability connection using Au pads and Au wires
5) Self-Timed Erase and Write Cycle
6) Page Write Function (16byte)
7) Write Protect Mode
Write Protect 1 (Onetime Rom) : 00h-7Fh
Write Protect 2 (Hardwire WP PIN) : 00h-FFh
8) Low Power consumption
Write
( at 5V ) :1.2mA (typ.)
Read
( at 5V ) :0.2mA(typ.)
Standby ( at 5V ) :0.1µA(typ.)
9) DATA security
Write protect feature (WP pin)
Inhibit to WRITE at low VCC
10) Compact package: SSOP-B8
11) High reliability fine pattern CMOS technology
12) Rewriting possible up to 1,000,000 times
13) Data retention: 40 years
14) Noise reduction Filtered inputs in SCL / SDA
15) Initial data FFh at all addresses
●Absolute Maximum Ratings (Ta=25℃)
Parameter
Symbol
Rating
Unit
Supply Voltage
VCC
-0.3～+6.5
V
Power Dissipation
Pd
300*
mW
Storage Temperature
Tstg
-65～+125
℃
Operating Temperature
Topr
-40～+85
℃
Terminal Voltage
-
-0.3～VCC+0.3
V
* Reduce by 3.0 mW/C over 25C
●Recommended operating conditions
Parameter
Symbol
Rating
Unit
Supply Voltage
VCC
1.7～5.5
V
Input Voltage
ＶIN
0～VCC
V
●Memory cell characteristics(Ta=25℃, VCC=1.7V～5.5V)
Parameter
Specification
Min.
Typ.
Write / Erase Cycle ^*1
1,000,000
-
Data Retention
*1
40
-
*1:Not 100% TESTED
Max.
-
-
Unit
Cycles
Years
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1/17
No.09002EAT04
2009.04 - Rev.A