RS5C372A-E2-F Datasheet, PDF (25/57 Pages) RICOH electronics devices division – I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC

RS5C372A/B
2.5-3 Year digit register (at internal address 6h)
D7
D6
D5
D4
D3
D2
D1
D0
Y80
Y40
Y20
Y10
Y8
Y4
Y2
Y1 (For write operation)
Y80
Y40
Y20
Y10
Y8
Y4
Y2
Y1 (For read operation)
Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Default^
)The default means read value when XSTP bit is set to “1” by starting up from 0V, or supply voltage drop, etc.
2.6 Time Trimming Register (at internal address 7h)
D7
D6
D5
D4
D3
D2
D1
D0
XSL
F6
F5
F4
F3
F2
F1
F0 (For write operation)
XSL
F6
F5
F4
F3
F2
F1
F0 (For read operation)
0
0
0
0
0
0
0
0
Default^
)The default means read value when XSTP bit is set to “1” by starting up from 0V, or supply voltage drop, etc.
2.6-1 XSL bit
The XSL bit is used to select a crystal oscillator.
Set the XSL to “0” (default) to use 32.768kHz.
Set the XSL to “1” to use 32.000kHz.
2.6-2 F6 to F0
The time trimming circuit adjust one second count based on this register readings when second digit is 00, 20,
or 40 seconds. Normally, counting up to seconds is made once per 32,768 of clock pulse (or 32,000 when
32.000kHz crystal is used) generated by the oscillator. Setting data to this register activates the time trimming
circuit.
Register counts will be incremented as ((F5, F4, F3, F2, F1, F0)–1)2 when F6 is set to “0”.
Register counts will be decremented as (( F5,F4,F3,F2,F1,F0 )1)2 when F6 is set to “1”.
Counts will not change when (F6, F5, F4, F3, F2, F1, F0) are set to (, 0, 0, 0, 0, 0,).
For example, when 32.768kHz crystal is used.
When (F6, F5, F4, F3, F2, F1, F0) are set to (0, 0, 0, 0, 1, 1, 1), counts will change as:
32,768(7–1)232,780 (clock will be delayed) when second digit is 00, 20, or 40.
When (F6, F5, F4, F3, F2, F1, F0) are set to (0, 0, 0, 0, 0, 0, 1), counts will remain 32,768 without changing
when second digit is 00, 20, or 40.
When (F6, F5, F4, F3, F2, F1, F0) are set to (1, 1, 1, 1, 1, 1, 0), counts will change as:
32,768(–2)232,764
(clock will be advanced) when second digit is 00, 20, or 40.
Adding 2 clock pulses every 20 seconds: 2/(32,76820)3.051ppm (or 3.125ppm when 32.000kHz crystal is
used), delays the clock by approx. 3ppm. Likewise, decrementing 2 clock pulses advances the clock by 3ppm.
Thus the clock may be adjusted to the precision of 1.5ppm. Note that the time trimming function only adjust
clock timing and oscillation frequency and 32-kHz clock output is not adjusted.
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