RX5C348A Datasheet, PDF (19/45 Pages) RICOH electronics devices division – 4-WIRE SERIAL INTERFACE

Rx5C348A/B
cause neither an increment nor decrement of time counts.
Example:
When the second digits read 00, 20, or 40, the settings of "0, 0, 0, 0, 1, 1, 1" in the F6, F5, F4, F3, F2, F1,
and F0 bits cause an increment of the current time counts of 32768 by (7 - 1) x 2 to 32780 (a current time
count loss). When the second digits read 00, 20, or 40, the settings of "0, 0, 0, 0, 0, 0, 1" in the F6, F5, F4,
F3, F2, F1, and F0 bits cause neither an increment nor a decrement of the current time counts of 32768.
When the second digits read 00, 20, or 40, the settings of "1, 1, 1, 1, 1, 1, 0" in the F6, F5, F4, F3, F2, F1,
and F0 bits cause a decrement of the current time counts of 32768 by (- 2) x 2 to 32764 (a current time
count gain).
An increase of two clock pulses once per 20 seconds causes a time count loss of approximately 3 ppm (2 /
(32768 x 20 = 3.051 ppm). Conversely, a decrease of two clock pulses once per 20 seconds causes a time
count gain of 3 ppm. Consequently, deviations in time counts can be corrected with a precision of ±1.5
ppm. Note that the oscillation adjustment circuit is configured to correct deviations in time counts and not
the oscillation frequency of the 32.768-kHz clock pulses. For further details, see "P.30 Oscillation
Adjustment Circuit".
Alarm_W Registers (Address 8-Ah)
Alarm_W Minute Register (Address 8h)
D7
D6
D5
D4
-
WM40 WM20 WM10
0
WM40 WM20 WM10
0
Indefinite Indefinite Indefinite
D3
WM8
WM8
Indefinite
D2
WM4
WM4
Indefinite
D1
WM2
WM2
Indefinite
D0
WM1
WM1
Indefinite
(For Writing)
(For Reading)
Default Settings *)
Alarm_W Hour Register (Address 9h)
D7
D6
D5
D4
-
-
WH20
WH10
WP⋅/A
0
0
WH20
WH10
WP⋅/A
0
0
Indefinite Indefinite
D3
WH8
WH8
Indefinite
D2
WH4
WH4
Indefinite
D1
WH2
WH2
Indefinite
D0
WH1
WH1
Indefinite
(For Writing)
(For Reading)
Default Settings *)
Alarm_W Day-of-week Register (Address Ah)
D7
D6
D5
D4
D3
D2
D1
D0
-
WW6 WW5 WW4 WW3 WW2 WW1 WW0 (For Writing)
0
WW6 WW5 WW4 WW3 WW2 WW1 WW0 (For Reading)
0
Indefinite Indefinite Indefinite Indefinite Indefinite Indefinite Indefinite
Default Settings *)
*) Default settings: Default value means read / written values when the XSTP bit is set to “1” due to VDD
power-on from 0v or oscillation stopping
*
The D5 bit of the Alarm_W Hour Register represents WP/A when the 12-hour mode is selected (0 for
a.m. and 1 for p.m.) and WH20 when the 24-hour mode is selected (tens in the hour digits).
*
The Alarm_W Registers should not have any non-existent alarm time settings.
(Note that any mismatch between current time and preset alarm time specified by the Alarm_W registers
may disable the alarm interrupt circuit.)
* When the 12-hour mode is selected, the hour digits read 12 and 32 for 0 a.m. and 0 p.m., respectively.
(See "P12 Control Register 1 (ADDRESS Eh) (2) /12⋅24: 12-/24-hour Mode Selection Bit")
*
WW0 to WW6 correspond to W4, W2, and W1 of the day-of-week counter with settings ranging from
(0, 0, 0) to (1, 1, 0).
*
WW0 to WW6 with respective settings of 0 disable the outputs of the Alarm_W Registers.
Rev.2.01
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