RX5C348A Datasheet, PDF (12/45 Pages) RICOH electronics devices division – 4-WIRE SERIAL INTERFACE

Rx5C348A/B
Register Settings
Control Register 1 (ADDRESS Eh)
D7
D6
D5
D4
D3
D2
D1
D0
WALE
DALE /12⋅24 /CLEN2 TEST CT2
CT1
CT0
(For Writing)
*2)
WALE
DALE /12⋅24 /CLEN2 TEST CT2
CT1
CT0
(For Reading)
*2)
0
0
0
0
0
0
0
0
Default Settings
*1)
*1) Default settings: Default value means read / written values when the XSTP bit is set to “1” due to
VDD
power-on from 0v or oscillation stopping
*2) This bit name applies to the Rx5C348A only. For the Rx5C348B the bit name is SCRATCH3..
(1) WALE, DALEAlarm_W Enable Bit, Alarm_D Enable Bit
WALE,DALE
Description
0
Disabling the alarm interrupt circuit (under the control of the settings
of the Alarm_W registers and the Alarm_D registers).
1
Enabling the alarm interrupt circuit (under the control of the settings
of the Alarm_W registers and the Alarm_D registers)
(Default)
(2) /12⋅24
/12-24-hour Mode Selection Bit
/12⋅24
Description
0
Selecting the 12-hour mode with a.m. and p.m. indications.
(Default)
1
Selecting the 24-hour mode
Setting the /12⋅24 bit to 0 and 1 specifies the 12-hour mode and the 24-hour mode, respectively.
24-hour mode
12-hour mode
24-hour mode
00
12 (AM12)
12
01
01 (AM 1)
13
02
02 (AM 2)
14
03
03 (AM 3)
15
04
04 (AM 4)
16
05
05 (AM 5)
17
06
06 (AM 6)
18
07
07 (AM 7)
19
08
08 (AM 8)
20
09
09 (AM 9)
21
10
10 (AM10)
22
11
11 (AM11)
23
Setting the /12⋅24 bit should precede writing time data
(3) /CLEN2 (Rx5C348A)
32kHz Clock Output Bit 2
/CLEN2
Description
12-hour mode
32 (PM12)
21 (PM 1)
22 (PM 2)
23 (PM 3)
24 (PM 4)
25 (PM 5)
26 (PM 6)
27 (PM 7)
28 (PM 8)
29 (PM 9)
30 (PM10)
31 (PM11)
0
Enabling the 32-kHz clock circuit
(Default)
1
Disabling the 32-kHz clock circuit
Setting the /CLEN2 bit or the /CLEN1 bit (D3 in the control register 2) to 0, specifies generating clock pulses
with the oscillation frequency of the 32.768-kHz crystal oscillator for output from the 32KOUT pin.
Conversely, setting both the /CLEN1 and /CLEN2 bit to 1 disabling (”H”) such output.
SCRATCH3 (Rx5C348B)
Scratch Bit 3
SCRATCH3
Description
0
(Default)
1
For the Rx5C348B, this bit is intended for scratching and accepts the reading and writing of 0 and 1. The
SCRATCH3 bit will be set to 0 when the XSTP bit is set to 1 in Control Register 2.
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Rev.2.01
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