RV5C339A_03 Datasheet, PDF (18/46 Pages) RICOH electronics devices division – 3-WIRE SERIAL INTERFACE REAL-TIME CLOCK IC WITH VOLTAGE MONITORING FUNCTION

RV5C339A
2.5-3 Year Counter (at Address 6h)
D7
D6
D5
D4
D3
D2
D1
D0
Y80
Y40
Y20
Y10
Y8
Y4
Y2
Y1
(For writing)
Y80
Y40
Y20
Y10
Y8
Y4
Y2
Y1
(For reading)
Indefinite Indefinite Indefinite Indefinite Indefinite Indefinite Indefinite Indefinite Default settings*
*^{) Default settings: Default value means read/written values when the XSTP bit is set to “1” due to power-on from 0 volts or supply voltage drop.}
2.6 Oscillation Adjustment Register (at Address 7h)
D7
D6
D5
D4
D3
D2
D1
D0
(0)
F6
F5
F4
F3
F2
F1
F0
(For writing)
(0)
F6
F5
F4
F3
F2
F1
F0
(For reading)
0
0
0
0
0
0
0
0
Default settings*
*^{) Default settings: Default value means read/written values when the XSTP bit is set to “1” due to power-on from 0 volts or supply voltage drop.}
2.6-1 (0) Bit
The (0) bit should be set to 0 to allow writing to the oscillation adjustment register. The (0) bit will be set to 0 when
the XSTP bit is set to 1 in the control register 2.
2.6-2 F6 to F0
The oscillation adjustment circuit is configured to change time counts of 1 second on the basis of the settings of the
oscillation adjustment register when the second digits read 00, 20, or 40 seconds. Normally, the second counter is
incremented once per 32768 32.768-kHz clock pulses generated by the crystal oscillator. Writing to the F6 to F0 bits
activates the oscillation adjustment circuit.
· The oscillation adjustment circuit will not operate with the same timing (00, 20, or 40 seconds) as the timing of
writing to the oscillation adjustment register.
· The F6 bit setting of 0 causes an increment of time counts by ((F5, F4, F3, F2, F1, F0) –1) × 2.
The F6 bit setting of 1 causes a decrement of time counts by (( F5, F4, F3, F2, F1, F0) +1) × 2.
The settings of “_*, 0, 0, 0, 0, 0, _*” ( “_*” representing either “0” or “1” ) in the F6, F5, F4, F3, F2, F1, and F0 bits
cause neither an increment nor decrement of time counts.
Example:
When the second digits read 00, 20, or 40, the settings of “0, 0, 0, 0, 1, 1, 1” in the F6, F5, F4, F3, F2, F1, and F0 bits
cause an increment of the current time counts of 32768 by (7–1) × 2 to 32780 (a current time count loss). When the
second digits read 00, 20, or 40, the settings of “0, 0, 0, 0, 0, 0, 1” in the F6, F5, F4, F3, F2, F1, and F0 bits cause neither
an increment nor a decrement of the current time counts of 32768.
When the second digits read 00, 20, or 40, the settings of “1, 1, 1, 1, 1, 1, 0” in the F6, F5, F4, F3, F2, F1, and F0 bits
cause a decrement of the current time counts of 32768 by (–2) × 2 to 32764 (a current time count gain).
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