RV5C387A_03 Datasheet, PDF (13/49 Pages) RICOH electronics devices division – I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC WITH VOLTAGE MONITORING FUNCTION

RV5C387A
Relation Between the Mode Waveform and the CTFG Bit
• Pulse mode
CTFG bit
INTRA pin
Approx. 92µs
(Increment of second counter)
Rewriting of the second counter
*) In the pulse mode, the increment of the second counter is delayed by approximately 92µs from the falling edge of clock pulses. Consequently, time
readings immediately after the falling edge of clock pulses may appear to lag behind the time counts of the real-time clocks by approximately 1 second.
Rewriting the second counter will reset the other time counters of less than 1 second, driving the INTRA pin low.
• Level mode
CTFG bit
INTRA pin
Setting CTFG bit to 0
(Increment of
second counter)
(Increment of
second counter)
Setting CTFG bit to 0
(Increment of
second counter)
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