RV5C387A_03 Datasheet, PDF (12/49 Pages) RICOH electronics devices division – I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC WITH VOLTAGE MONITORING FUNCTION

RV5C387A
2.1-5 CT2, CT1, and CT0
Periodic Interrupt Selection Bits
CT2 CT1 CT0
Waveform Mode
Description
Interrupt Cycle and Fall Timing
0
0
0
—
Off (“H”)
0
0
1
—
Fixed at low (“L”)
0
1
0 Pulse Mode 2Hz (Duty cycle of 50%)
0
1
1 Pulse Mode 1Hz (Duty cycle of 50%)
1
0
0 Level Mode Once per 1 second (Synchronized with second counter increment)
1
0
1 Level Mode Once per minute (at 00 seconds of every minute)
1
1
0 Level Mode Once per hour (at 00 minutes and 00 seconds of every hour)
1
1
1 Level Mode Once per month (at 00 hours, 00 minutes, and 00 seconds of first day of every month)
(Default setting)
1) Pulse Mode: 2-Hz and 1-Hz clock pulses are output in synchronization with the increment of the second counter
as illustrated in the timing chart on the next page.
2) Level Mode: periodic interrupt signals are output with selectable interrupt cycle settings of 1 second, 1 minute,
1 hour, and 1 month. The increment of the second counter is synchronized with the falling edge of
periodic interrupt signals. For example, periodic interrupt signals with an interrupt cycle setting
of 1 second are output in synchronization with the increment of the second counter as illustrated
in the timing chart on the next page.
3) When the oscillation adjustment circuit is used, the interrupt cycle will fluctuate once per 20 seconds as follows:
Pulse Mode: the “L” period of output pulses will increment or decrement by a maximum of ±3.784ms.
For example, 1-Hz clock pulses will have a duty cycle of 50 ±0.3784%.
Level Mode: a periodic interrupt cycle of 1 second will increment or decrement by a maximum of ±3.784ms.
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