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RT9945 Datasheet, PDF (32/33 Pages) Richtek Technology Corporation – Power Management ICs for Handheld Device
RT9945
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
Four Layers PCB
WQFN-40L 5x5
25
50
75
100
125
Ambient Temperature (°C)
Figure 23. Derating Curves for RT9945 Packages
PCB Layout Guide Considerations
For the best performance of the RT9945, the following PCB Layout guidelines must be strictly followed.
` Place the input and output capacitors as close as possible to the input and output pins.
` Keep the main power traces as possible as wide and short.
` To minimize EMI, the switching area connected to LX inductor should be smallest possible.
` Place the feedback components as close as possible to the FB pin and keep these components away from the noisy
devices. Also, the feed forward capacitor CFF trace is sensitive to the magnetic field that the inductor generates. Please
keep the CFF trace away from the inductor and use a via and run the trace between ground layers.
` Connect the GND and Exposed Pad to a strong ground plane for maximum thermal dissipation and noise protection.
GND GND
CPWR_IN
CSYS
R14 VSYS
VSYS
Keep the voltage feedback
network very close to the IC,
R1
40 39 38 37 36 35 34 33 32 31
R13
but away from Inductor & LX.
GND
nCHG_S 1
30 DATA
CBATT
Buck1
R2
ISETA 2
29 BATT
R3
TS 3
28 BATT
CFF1
GND C6
GND
C3
CIN2
C2
CIN3
C1
TIMER 4
VOUT2 5
VIN3 6
VOUT3 7
VOUT1 8
VIN2 9
VOUT4 10
27 FB1
GND
26 PGND1 R11 R10
25 LX1
24 VIN1
L1
23 LX2
L2
41
22 PGND2 R13 R12
21 FB2
CBuck1
CIN1 GND
CBuck2
GND
C4
11 12 13 14 15 16 17 18 19 20
CFF2
high-current path should be
made as short and wide as
C5
possible.
GND
Place input and output
capacitors (connected to the
ground) as close as possible
to the IC.
R9
R6 R7 R8
VSYS
R4 R5
VSYS
VSYS
Buck2
Connect the inductors, output
capacitors, and feedback resistors
as close to the IC as possible and
keep the traces short, direct, and
wide.
Figure 24. PCB Layout Guide
www.richtek.com
32
DS9945-01 April 2011