RT8862 Datasheet, PDF (28/29 Pages) Richtek Technology Corporation – Advanced 4/3/2/1-Phase PWM Controller with Embedded Drivers for CPU Core Power Supply

RT8862
resistance θ_JA is 34°C/W on the standard JEDEC 51-7
four layers thermal test board. The maximum power
dissipation at T_A = 25°C can be calculated by following
formula :
P_D(MAX) = (125°C − 25°C) / (34°C/W) = 2.941W for
WQFN-48L 7x7
The maximum power dissipation depends on operating
ambient temperature for fixed T_J(MAX) and thermal
resistance θ_JA. For RT8862 package, the Figure 19 of
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation allowed.
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
Four Layers PCB
WQFN-48L 7x7
25
50
75
100
125
Ambient Temperature (°C)
Figure 19. Derating Curves for RT8862 Packages
Layout Considerations
For best performance of the RT8862, the following
guidelines must be strictly followed :
` Input bulk capacitors and MLCCs have to be put near
high side MOSFETs. The connection plane of input
capacitors and high side MOSFETs then can be kept as
square as possible.
` The shape of phase planes (the connection plane
between high side MOSFETs, low side MOSFETs and
output inductors) have to be as square as possible. Long
traces, thin bars or separated islands must be avoided
in phase planes.
` Keep snubber circuits or damping elements near its
objects. Phase RC snubbers have to be close to low
side MOSFETs, UGATE damping resistors have to be
close to high side MOSFETs, and boot to phase damping
resistors have to be close to high side MOSFETs and
phase planes. Also keep the traces of these snubbers
circuits as short as possible.
` The area of V_IN plane (power stage 12V V_IN) and V_OUT
plane (output bulk capacitors and inductors connection
plane) have to be as wide as possible. Long traces or
thin bars must be avoided in these planes. The plane
trace width must be wide enough to carry large input/
output current (40mil/A).
` The following traces have to be wide and short : UGATE,
LGATE, BOOT, PHASE, and VCC12. Make sure the
width of these traces are wide enough to carry large
driving current(at least 40mil).
` The voltage feedback loop contains two traces, VCC
and VSS, which are Kelvin sensed from CPU socket or
output capacitors. These two traces are suggested above
10mil width and put away from high (di/dt) switching
elements such as high side MOSFETs, low side
MOSFETs, phase plane etc. The circuit elements of
voltage feedback loop, such as feedback loop short
resistors and voltage loop compensation RCs, have to
be kept near the RT8862 and also away from switching
elements.
` The current sense mechanism of the RT8862 is fully
differential Kelvin sense. Therefore, the current sense
loops of the RT8862 contain two traces : the positive
traces(ISP1 to ISP4) come from the positive node of
output inductors(the node connecting phase plane) and
the negative traces (ISN1 to ISN4) come from the
negative node of output inductors(the node connecting
output plane).
DO NOT connect the current sense traces from phase
plane or output plane. Only connect these traces from
both sides of output inductors can achieve the goal of
precise Kelvin sense. The current sense feedback loops
have to be routed away from switching elements, and
the current sense RC elements have to be put near
their respective ISN or ISP pins of the RT8862 and also
away from noise switching elements. At lease 10 mil
width is suggested for current sense feedback loops.
www.richtek.com
28
DS8862-01 April 2011