RFDA0045 Datasheet, PDF (5/10 Pages) RF Micro Devices – DIGITAL CONTROLLED VARIABLE GAIN AMPLIFIER 10MHZ TO 850MHZ

RFDA0045
SPI Timing Diagram
CLK
DATA
LE
DOUT
Serial Port Interface
Programming Example, 6-Bit
CLK
DATA
LE
MSB
D5
D4
D3
D2
LSB
D1 D0
SPI Timing Diagram Specifications
Parameter Limit
Unit
Comment
t1
25
MHz max
CLK Frequency
t2
20
ns min
CLK High
t3
20
ns min
CLK Low
t4
5
ns min
DATA to CLK Setup Time
t5
5
ns min
DATA to CLK Hold Time
t6
30
ns min
DATA Valid
t7
5
ns min
LE to CLK Setup Time
t8
5
ns min
CLK to LE Setup Time
t9
10
ns min
LE Pulse Width
t10
20
ns max
Output Set
Truth Table
Control Bit
D5
D4
D3
D2
D1
D0
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
1
0
0
0
0
0
0
Power-up Programming Truth Table
PUP
Attenuator Setting
High
Attenuation at min, 0dB
Low
Attenuation at max, 31.5dB
State
Low
High
Gain Relative to Maximum Gain
0 dB
-0.5 dB
-1 dB
-2 dB
-4 dB
-8 dB
-16 dB
-31.5 dB
Logic Voltage Levels
Logic
0V to 0.8V
2.0V to 5.0V
DS110621
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
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