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RFFC2071 Datasheet, PDF (4/23 Pages) RF Micro Devices – 2.7GHz RF SYNTHESIZER/VCO WITH INTEGRATED RF MIXER
RFFC2071/2072
Pin Names and Descriptions
Pin
Name Description
1
ENBL/GPO5 Device Enable pin. See note 1 and 2.
2
EXT_LO
External local oscillator input (see note 4).
3
EXT_LO_DEC Decoupling pin for external local oscillator (see note 4).
4
REXT
External bandgap bias resistor. See note 3.
5
ANA_VDD1 Analog supply. Use good RF decoupling.
6
LFILT1
Phase detector output. Low-frequency noise-sensitive node.
7
LFILT2
Loop filter op-amp output. Low-frequency noise-sensitive node.
8
LFILT3
VCO control input. Low-frequency noise-sensitive node.
9 MODE/GPO6 Mode select pin. See note 1 and 2.
10
REF_IN
Reference input. Use AC coupling capacitor.
11
NC
12
TM
Connect to ground.
13
MIX1_IPN Differential input 1 (see note 4). On RFFC2072 this pin is NC.
14
MIX1_IPP Differential input 1 (see note 4). On RFFC2072 this pin is NC.
15 GPO1/ADD1 General purpose output / MultiSlice address bit.
16 GPO2/ADD2 General purpose output / MultiSlice address bit.
17
MIX1_OPN Differential output 1 (see note 5). On RFFC2072 this pin is NC.
18
MIX1_OPP Differential output 1 (see note 5). On RFFC2072 this pin is NC.
19
DIG_VDD Digital supply. Should be decoupled as close to the pin as possible.
20
NC
21
NC
22
ANA_VDD2 Analog supply. Use good RF decoupling.
23
MIX2_IPP Differential input 2 (see note 4).
24
MIX2_IPN Differential input 2 (see note 4).
25
GPO3/FM General purpose output / frequency control input.
26 GPO4/LD/DO General purpose output / Lock detect output / serial data out.
27
MIX2_OPN Differential output 2 (see note 5).
28
MIX2_OPP Differential output 2 (see note 5).
29
RESETX
Chip reset (active low). Connect to DIG_VDD if asynchronous reset is not required.
30
ENX
Serial interface select (active low). See note 1.
31
SCLK
Serial interface clock. See note 1.
32
SDATA
Exposed paddle
Serial interface data. See note 1.
Ground reference, should be connected to PCB ground through a low impedance path.
Note 1: An RC low pass filter could be used on this line to reduce digital noise.
Note 2: If the device is under software control this input can be configured as a general purpose output (GPO).
Note 3: Connect a 51kΩ resistor from this pin to ground, this pin is sensitive to low frequency noise injection.
Note 4: DC voltage should not be applied to this pin. Use either an AC-coupling capacitor as part of lumped element matching
network or a transformer (see evaluation board schematic).
Note 5: This pin must be connected to ANA_VDD2 using an RF choke or a transformer (see application schematic).
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