RF5111_15 Datasheet, PDF (4/14 Pages) RF Micro Devices – DCS POWER AMPLIFIER

RF5111
Pin Function Description
Interface Schematic
1
VAT EN
Control pin for the pin diode. The purpose of the pin diode is to attenuate
RF drive level when V_APC is low. This serves to reduce RF leakage through
the device caused by self-biasing under high RF drive levels. A good input
match is maintained when the input stage bias is turned off by the same
mechanism. When this pin is set high, pin diode attenuation control is
turned on. (See Theory of Operation for details.)
2
RF IN
RF Input. This is a 50Ω input, but the actual impedance depends on the
interstage matching network connected to pin 5. An external DC blocking
VCC1
capacitor is required if this port is connected to a DC path to ground or a
DC voltage.
RF IN
PIN GND
1
3
4
5
GND1
VCC1
APC1
Ground connection for the preamplifier stage. For best performance, keep
S _{traces physically short and connect immediately to the ground plane. It is}
important for stability that this pin has it’s own vias to the groundplane, to
N minimize any common inductance.
Power supply for the preamplifier stage and interstage matching. This pin
IG ^{forms the shunt inductance needed for proper tuning of the interstage}
match. Refer to the application schematic for proper configuration, and
note that position and value of the components are important.
S _{Power Control for the driver stage and preamplifier. When this pin is “low”,}
all circuits are shut off. A “low” is typically 0.5V or less at room tempera-
E _{ture. A shunt bypass capacitor is required. During normal operation this pin}
D ^{is the power control. Control range varies from approximately 1.0V for -}
From Attn
From Bias
control circuit Stages
See pin 2.
See pin 2.
APC VCC
10dBm to 2.6V for +33dBm RF output power. The maximum power achiev-
6
7
8
9
10
APC2
VCC
NC
NC
RF OUT
able depends on the actual output matching; see the application informa-
tion for more details. The maximum current into this pin is 5mA when
V_APC1=2.6V, and 0mA when V_APC=0V.
EW _{Power control for the output stage. See pin 6 for more details.}
N Power supply for the bias circuits.
Not connected.
R Not connected.
RF output and power supply for the output stage. Bias voltage for the final
O _{stage is provided through this wide output pin. An external matching net-}
F ^{work is required to provide the optimum load impedance.}
GND
GND
See pin 6.
See pin 6.
To RF
Stages
RF OUT
11
12
T _{RF OUT}
NO ^{RF OUT}
Same as pin 10.
Same as pin 10.
From Bias
Stages ^GND
PCKG BASE
Same as pin 10.
Same as pin 10.
13
2F0
Connection for the second harmonic trap. This pin is internally connected Same as pin 10.
to the RF OUT pins. The bonding wire together with an external capacitor
form a series resonator that should be tuned to the second harmonic fre-
quency in order to increase efficiency and reduce spurious outputs.
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Rev A1 DS150909