H8-3857 Datasheet, PDF (97/560 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcomputer

3. Exception Handling
3.3 Interrupts
3.3.1 Overview
In the H8/3857 Group, sources that initiate interrupt exception handling include 13 external
interrupts (WKP₇ to WKP₀, and IRQ₄ to IRQ₀), and 16 internal interrupts from on-chip peripheral
modules. In the H8/3854 Group, sources that initiate interrupt exception handling include 12
external interrupts (WKP₇ to WKP₀, IRQ₄, IRQ₃, IRQ₁, and IRQ₀), and 14 internal interrupts from
on-chip peripheral modules. Table 3.2 shows the interrupt sources, their priorities, and their vector
addresses. When more than one interrupt is requested, the interrupt with the highest priority is
processed.
The interrupts have the following features:
• Both internal and external interrupts can be masked by the I bit of CCR. When this bit is set to
1, interrupt request flags are set but interrupts are not accepted.
• The external interrupt pins IRQ₀ to IRQ₄ can each be set independently to either rising edge
sensing or falling edge sensing.
Rev.3.00 Jul. 19, 2007 page 73 of 532
REJ09B0397-0300