H8-3857 Datasheet, PDF (65/560 Pages) Renesas Technology Corp – 8-Bit Single-Chip Microcomputer

Operation Notation
Rd
Rs
Rn
(EAd), <EAd>
(EAs), <EAs>
CCR
N
Z
V
C
PC
SP
#IMM
disp
+
–
×
÷
∧
∨
⊕
→
~
:3
:8
:16
( ), < >
General register (destination)
General register (source)
General register
Destination operand
Source operand
Condition code register
N (negative) flag of CCR
Z (zero) flag of CCR
V (overflow) flag of CCR
C (carry) flag of CCR
Program counter
Stack pointer
Immediate data
Displacement
Addition
Subtraction
Multiplication
Division
AND logical
OR logical
Exclusive OR logical
Move
Logical negation (logical complement)
3-bit length
8-bit length
16-bit length
Contents of operand indicated by effective address
2. CPU
Rev.3.00 Jul. 19, 2007 page 41 of 532
REJ09B0397-0300