R32C111 Datasheet, PDF (95/102 Pages) Renesas Technology Corp – RENESAS MCU

Revision History
R32C/111 Group Datasheet
Rev.
1.10
Date
Sep 17, 2009
Page
15, 16
18
19
20
21, 22
22
25
32
38
43
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81
—
—
1
2
3
4-7
Description
Summary
• “Interrupt table register” in Figure 2.1 and 2.1.6 changed to “Interrupt
vector table base register”
• Scribal error: “24 bit” in 2.2.2 corrected to “32 bit”
Chapter 3
• Descriptions for this chapter and Figure 3.1 modified
Chapter 4
• “(SFR)” of chapter title changed to “(SFRs)”
• Description for initial paragraph of Chapter 4 modified
• Reset value for CCR and PBC in Table 4.1 changed
• “UARTi Bus Collision Detection Interrupt Control Register” (i = 0 to 6)
in Tables 4.2 and 4.3 changed to “UARTi Bus Collision, Start/Stop
Condition Detection Interrupt Control Register”
• “DMAi interrupt” in Tables 4.2 and 4.3 changed to “DMAi transfer
complete interrupt”
• Reset value for IIO3IR and IIO8IR to IIO11R in Table 4.3 modified
• Scribal error: address “00010Fh” added to Table 4.6
• “Upward/Downward Counting Select Register” in Table 4.13 changed
to “Increment/Decrement Counting Select Register”
• CSOP2 for address 040056h in Table 4.19 deleted
• Reset value for CM3 in Table 4.19 changed
• “DMAi Source Select Register i” in Table 4.24 changed to “DMAi
Request Source Select Register i”
Chapter 5
• This chapter newly added
Appendix 1
• “Package Dimension” as title changed to “Package Dimensions”
Third edition released
The manual in general
• Added 100-pin plastic molded LGA and 80- and 64-pin plastic molded
LQFP packages
• When new tables/figures are added for 80-/64-pin packages, add the
following description: “(for the 100-pin package)” to the title of
corresponding current tables/figures
Chapter 1. Overview
• Added description for 100-pin LGA and 80-/64-pin packages to lines
12 and 13 of 1.1; Added description “a maximum of” to “nine channels
of serial interface”; Deleted the whole description of “Notes to users”
• Changed minimum RAM size “40” in Table 1.1, to “32”
• Modified description for “External Bus Expansion”, to Table 1.1; Moved
this unit below “Clock”
• Added “(optional)” for IEBus mode for “Intelligent I/O” in Table 1.2
• Modified description for “Flash memory” in Tables 1.2
• Added “100-pin plastic molded TFLGA (PTLG0100KA-A)” to Table 1.2
• Added Tables 1.3 to 1.6 to provide specifications for 80-/64-pin
packages
A- 2