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HD74HC595 Datasheet, PDF (9/11 Pages) Hitachi Semiconductor – 8-bit Shift Register/Latch (with 3-state outputs) | |||
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HD74HC595
⢠Waveform â 5 (SCK to RCK)
tr
tf
90 %
90 %
VCC
Input SCK
50 %
10 %
10 %
0V
tsu
tw
90 %
VCC
Input RCK
50 %
50 %
10 %
10 %
0V
tr
tf
Note : 1. Input waveform : PRR ⤠1 MHz, duty cycle 50%, tr ⤠6 ns, tf ⤠6 ns
⢠Waveform â 6 (tZL, tZH, tLZ, tHZ)
tf
tr
Input G
90 %
50 %
90 %
VCC
50 %
10 %
10 %
0V
tZL
tLZ
VOH
Waveform - A
50 %
10 %
tZH
tHZ
VOL
90 %
VOH
Waveform - B
50 %
VOL
Notes : 1. Input waveform : PRR ⤠1 MHz, duty cycle 50%, tr ⤠6 ns, tf ⤠6 ns
2. Waveform - A is for an output with internal conditions such that the
output is low except when disabled by the output control.
3. Waveform - B is for an output with internal conditions such that the
output is high except when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
Rev.2.00 Mar 30, 2006 page 9 of 10
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