HD74HC595 Datasheet, PDF (8/11 Pages) Hitachi Semiconductor – 8-bit Shift Register/Latch (with 3-state outputs)

HD74HC595
• Waveform – 3 (SCLR to QH')
tf
tr
90 %
90 %
V_CC
Input SCLR
50 %
50 %
10 %
10 %
tw
0V
t_PHL
90 %
V_OH
Output QH'
50 %
10 %
V_OL
t_THL
t_rem
Input SCK
90 %
V_CC
50 %
10 %
0V
t_TLH
Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, t_r ≤ 6 ns, t_f ≤ 6 ns
• Waveform – 4 (SER to SCK)
tr/tf
tr/tf
90 %
90 %
90 %
90 %
V_CC
Input SER _{50 % 50 %}
50 % ^{50 %}
10 %
10 %
10 %
10 %
0V
t_su
t_h
90 %
V_CC
Input SCK
50 %
10 %
0V
t_r
Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, t_r ≤ 6 ns, t_f ≤ 6 ns
Rev.2.00 Mar 30, 2006 page 8 of 10