RJK0215DPA Datasheet, PDF (8/11 Pages) Renesas Technology Corp – Silicon N Channel Power MOS FET with Schottky Barrier Diode High Speed Power Switching

RJK0215DPA
Static Drain to Source On State Resistance
vs. Temperature
10
Pulse Test
8
I_D = 5 A, 10 A, 20 A
6
V_GS = 4.5 V
4
2
10 V
5 A, 10 A, 20 A
0
–25 0 25 50 75 100 125 150
Case Temperature Tc (°C)
Dynamic Input Characteristics
50
I_D = 40 A
40
20
V_GS
16
V_DD = 20 V
30
10 V
12
V_DS
20
8
10
4
V_DD = 20 V
10 V
0
0
0
12 24 36 48 60
Gate Charge Qg (nc)
Maximum Avalanche Energy vs.
Channel Temperature Derating
30
24
18
12
6
0
25 50 75 100 125 150
Channel Temperature Tch (°C)
Preliminary
10000
Typical Capacitance vs.
Drain to Source Voltage
3000
1000
300
100
Ciss
Coss
Crss
30
V_GS = 0
10 ^{f = 1 MHz}
0
10
20 25
Drain to Source Voltage V_DS (V)
Reverse Drain Current vs.
Source to Drain Voltage
50
10 V
5V
40
Pulse Test
30
20
10
V_GS = 0, –5 V
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
R07DS0207EJ0110 Rev.1.10
Sep 05, 2011
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