M65665DSP Datasheet, PDF (8/18 Pages) Renesas Technology Corp – PICTURE-IN-PICTURE SIGNAL PROCESSING

M65665DSP
Basic Application Example 2
When using any or all of the information contained in this diagrams, please be sure to evaluate all information as a total
system before making a final decision on the applicability of the information and products.
Dig.
Digital +3.3V power supply
Digital GND
Ana. _{Analog +3.3V power supply}
Analog GND
<NTSC / PAL-M / PAL-N application example>
22 pin input level
Sub C(Y/C) input _0.01u 22
pedestal
0.7Vpp(typ)
23
Sub CVBS and Y(Y/C) input _0.1u 24
white peak
24 pin input level
0.47u _{3.3 K}
25
0.66V(max)
1.0Vpp
(max)
0.033u
26
3.3 M
pedestal
sync tip
0.22u
18 p
18 p
18 p
27
0
X1
28
0
X2
29
0
X3
30
31
32 pin /33 pin input level _{Main HD input}
32
3.3V-5.0V
0V _{Main VD input}
33
36 pin output level
34
pedestal
0.7Vpp (typ) ^{OSD B input} 0.1u ³⁵
PIP V(B) output _0.01u 36
39 pin output level
0.01u ³⁷
pedestal
0.7Vpp (typ) ^{OSD G input} 0.1u ³⁸
PIP U(G) output _0.01u 39
42 pin output level
white peak
OSD R input
40
0.1u ⁴¹
back ground
0.7V (typ) _{PIP Y(R) output 0.01u 42}
pedestal
21 _0.01u
20 _0.1u Sub Y(Y/U/V) input
19 _0.01u
20 pin input level
white peak
18
0.1u
Sub U input ^0.66V
(max)
17 _0.1u Sub V input
1.0Vpp
(max)
pedestal
16
sync tip
18 pin input level
15
0.7Vpp (typ)
14
10u
pedestal
13
10K
17 pin input level
12
0.7Vpp (typ)
pedestal
11
10
15 pin input when CSYNC
of sub picture is fed from
9
external.
3.3V
8
0V
7
2 pin input level
6
3.3V
0V
5
4
I²C BUS Clock input
3
I²C BUS DATA input /output
2
OSD selection input
1
PIP SW output ^{1 pin output level}
3.3V
0V
X1 : SIWARD 1-781-377-21(14.318180MHz)
X2 : SIWARD 1-795-487-11(14.302444MHz)
X3 : SIWARD 1-795-486-11(14.328224MHz)
Rev.2.00, Sep.04.2003, page 8 of 17